Searched refs:BoolRC (Results 1 – 4 of 4) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SILowerControlFlow.cpp | 85 const TargetRegisterClass *BoolRC = nullptr; member in __anon0c226a110111::SILowerControlFlow
242 : MRI->createVirtualRegister(BoolRC); in emitIf()
249 Register Tmp = MRI->createVirtualRegister(BoolRC); in emitIf()
325 Register SaveReg = MRI->createVirtualRegister(BoolRC); in emitElse()
399 AndReg = MRI->createVirtualRegister(BoolRC); in emitIfBreak()
773 BoolRC = TRI->getBoolRC(); in run()
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| H A D | SIWholeQuadMode.cpp | 1277 const TargetRegisterClass *BoolRC = TRI->getBoolRC(); in processBlock() local
1420 SavedNonStrictReg = MRI->createVirtualRegister(BoolRC); in processBlock()
1428 SavedWQMReg = MRI->createVirtualRegister(BoolRC); in processBlock()
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| H A D | SIInstrInfo.td | 1067 class BoolRC : RegisterOperand<SReg_1> {
1077 def VOPDstS64orS32 : BoolRC {
1128 def SDWAVopcDst : BoolRC {
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| H A D | SIISelLowering.cpp | 4688 const TargetRegisterClass *BoolRC = TRI->getBoolRC(); in emitLoadM0FromVGPRLoop() local
4689 Register PhiExec = MRI.createVirtualRegister(BoolRC); in emitLoadM0FromVGPRLoop()
4690 Register NewExec = MRI.createVirtualRegister(BoolRC); in emitLoadM0FromVGPRLoop()
4693 Register CondReg = MRI.createVirtualRegister(BoolRC); in emitLoadM0FromVGPRLoop()
5347 const TargetRegisterClass *BoolRC = TRI->getBoolRC(); in EmitInstrWithCustomInserter() local
5353 MI, MRI, Src0, BoolRC, AMDGPU::sub0, &AMDGPU::SReg_32RegClass); in EmitInstrWithCustomInserter()
5355 MI, MRI, Src0, BoolRC, AMDGPU::sub1, &AMDGPU::SReg_32RegClass); in EmitInstrWithCustomInserter()
5358 MI, MRI, Src1, BoolRC, AMDGPU::sub0, &AMDGPU::SReg_32RegClass); in EmitInstrWithCustomInserter()
5360 MI, MRI, Src1, BoolRC, AMDGPU::sub1, &AMDGPU::SReg_32RegClass); in EmitInstrWithCustomInserter()
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