Searched refs:AddrNumOperands (Results 1 – 14 of 14) sorted by relevance
280 MachineOperand &StackAdjust = MBBI->getOperand(isMem ? X86::AddrNumOperands in expandMI()347 for (unsigned i = 0; i != X86::AddrNumOperands; ++i) in expandMI()456 for (unsigned Idx = 1 + 1; Idx < 1 + X86::AddrNumOperands; ++Idx) in expandMI()489 for (int i = 0; i < X86::AddrNumOperands; ++i) { in expandMI()513 Register Reg = MBBI->getOperand(X86::AddrNumOperands).getReg(); in expandMI()514 bool SrcIsKill = MBBI->getOperand(X86::AddrNumOperands).isKill(); in expandMI()523 for (int i = 0; i < X86::AddrNumOperands; ++i) { in expandMI()667 for (int i = 0; i < X86::AddrNumOperands; ++i) { in expandMI()701 Register TReg = MBBI->getOperand(X86::AddrNumOperands).getReg(); in expandMI()702 bool SrcIsKill = MBBI->getOperand(X86::AddrNumOperands).isKill(); in expandMI()[all …]
290 const MachineOperand &ImmOp = MI->getOperand(X86::AddrNumOperands); in classifyInstruction()296 const MachineOperand &ImmOp = MI->getOperand(X86::AddrNumOperands); in classifyInstruction()507 const MachineOperand &PushOp = Store->getOperand(X86::AddrNumOperands); in adjustCallSequence()553 for (unsigned i = NumOps - X86::AddrNumOperands; i != NumOps; ++i) in adjustCallSequence()
424 MachineOperand &StoreSrcVReg = StoreInst->getOperand(X86::AddrNumOperands); in buildCopy()426 NewStore->getOperand(X86::AddrNumOperands).setIsKill(StoreSrcVReg.isKill()); in buildCopy()
537 MemOpEnd = MemOpStart + X86::AddrNumOperands; in usedAsAddr()573 OpIdx += (X86::AddrNumOperands - 1); in buildClosure()
719 if (MI.getOperand(X86::AddrNumOperands).getSubReg() == 0 && in isStoreToStackSlot()721 return MI.getOperand(X86::AddrNumOperands).getReg(); in isStoreToStackSlot()737 return MI.getOperand(X86::AddrNumOperands).getReg(); in isStoreToStackSlotPostFE()3635 if (NumOps < X86::AddrNumOperands) { in getFirstAddrOperandIdx()3646 for (unsigned I = 0, E = NumOps - X86::AddrNumOperands; I != E; ++I) { in getFirstAddrOperandIdx()3650 Desc.operands().begin() + I + X86::AddrNumOperands, in getFirstAddrOperandIdx()3664 assert(MI.getNumOperands() >= (OpNo + X86::AddrNumOperands) && in getConstantFromPool()6105 Register SrcReg = MIB.getReg(X86::AddrNumOperands); in expandNOVLXStore()6115 MIB->getOperand(X86::AddrNumOperands).setReg(SrcReg); in expandNOVLXStore()7464 if (MOs.size() == X86::AddrNumOperands && in foldMemoryOperandImpl()[all …]
173 return Op + X86::AddrNumOperands <= MI.getNumOperands() && in isMem()
428 assert(OutMI.getNumOperands() == 1 + X86::AddrNumOperands && in Lower()499 assert(OutMI.getNumOperands() == X86::AddrNumOperands && in Lower()1892 assert(MI->getNumOperands() >= (3 + X86::AddrNumOperands + 1) && in addConstantComments()
835 for (int i = 0; i < X86::AddrNumOperands; ++i) in rewriteSetCC()
399 assert(MI.getNumOperands() >= (OperandNo + X86::AddrNumOperands) && in processInstruction()
1198 assert((NumOps == X86::AddrNumOperands + 1 || NumOps == 1) && in handleOneArgFP()
35809 static_assert(X86::AddrNumOperands == 5, "VAARG assumes 5 address operands"); in EmitVAARGWithCustomInserter()36992 for (unsigned i = 0; i < X86::AddrNumOperands; ++i) { in emitSetJmpShadowStackFix()37098 for (unsigned i = 0; i < X86::AddrNumOperands; ++i) { in emitEHSjLjSetJmp()37258 for (unsigned i = 0; i < X86::AddrNumOperands; ++i) { in emitLongJmpShadowStackFix()37390 for (unsigned i = 0; i < X86::AddrNumOperands; ++i) { in emitEHSjLjLongJmp()37403 for (unsigned i = 0; i < X86::AddrNumOperands; ++i) { in emitEHSjLjLongJmp()37417 for (unsigned i = 0; i < X86::AddrNumOperands; ++i) { in emitEHSjLjLongJmp()37926 .addReg(MI.getOperand(X86::AddrNumOperands).getReg()); in EmitInstrWithCustomInserter()38037 for (unsigned Idx = 0; Idx < X86::AddrNumOperands; ++Idx) in EmitInstrWithCustomInserter()38039 MIB.add(MI.getOperand(X86::AddrNumOperands)); in EmitInstrWithCustomInserter()[all …]
1083 CurOp += X86::AddrNumOperands; in emitVEXOpcodePrefix()1107 CurOp += X86::AddrNumOperands; in emitVEXOpcodePrefix()1150 CurOp += X86::AddrNumOperands; in emitVEXOpcodePrefix()1163 Prefix.set4VV2(MI, CurOp + X86::AddrNumOperands); in emitVEXOpcodePrefix()1195 CurOp += X86::AddrNumOperands + 1; // Skip first imm. in emitVEXOpcodePrefix()1412 CurOp += X86::AddrNumOperands; in emitREXPrefix()1421 CurOp += X86::AddrNumOperands; in emitREXPrefix()1679 unsigned SrcRegNum = CurOp + X86::AddrNumOperands; in encodeInstruction()1688 unsigned SrcRegNum = CurOp + X86::AddrNumOperands; in encodeInstruction()1707 CurOp = MemOp + X86::AddrNumOperands; in encodeInstruction()[all …]
36 AddrNumOperands = 5 enumerator
3936 Inst.getOperand(Inst.getNumOperands() - X86::AddrNumOperands - 1) in validateInstruction()