xref: /linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_mcg/dml2_mcg_factory.c (revision 92c4c9fdc838d3b41a996bb700ea64b9e78fc7ea)
1 // SPDX-License-Identifier: MIT
2 //
3 // Copyright 2024 Advanced Micro Devices, Inc.
4 
5 #include "dml2_mcg_factory.h"
6 #include "dml2_mcg_dcn4.h"
7 #include "dml2_mcg_dcn42.h"
8 #include "dml2_external_lib_deps.h"
9 
dummy_build_min_clock_table(struct dml2_mcg_build_min_clock_table_params_in_out * in_out)10 static bool dummy_build_min_clock_table(struct dml2_mcg_build_min_clock_table_params_in_out *in_out)
11 {
12 	(void)in_out;
13 	return true;
14 }
15 
dml2_mcg_create(enum dml2_project_id project_id,struct dml2_mcg_instance * out)16 bool dml2_mcg_create(enum dml2_project_id project_id, struct dml2_mcg_instance *out)
17 {
18 	bool result = false;
19 
20 	if (!out)
21 		return false;
22 
23 	memset(out, 0, sizeof(struct dml2_mcg_instance));
24 
25 	switch (project_id) {
26 	case dml2_project_dcn4x_stage1:
27 		out->build_min_clock_table = &dummy_build_min_clock_table;
28 		result = true;
29 		break;
30 	case dml2_project_dcn40:
31 	case dml2_project_dcn4x_stage2:
32 	case dml2_project_dcn4x_stage2_auto_drr_svp:
33 		out->build_min_clock_table = &mcg_dcn4_build_min_clock_table;
34 		result = true;
35 		break;
36 	case dml2_project_dcn42:
37 		out->build_min_clock_table = &mcg_dcn42_build_min_clock_table;
38 		result = true;
39 		break;
40 	case dml2_project_invalid:
41 	default:
42 		break;
43 	}
44 
45 	return result;
46 }
47