1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Loongson GPIO Support
4 *
5 * Copyright (C) 2022-2023 Loongson Technology Corporation Limited
6 */
7
8 #include <linux/kernel.h>
9 #include <linux/init.h>
10 #include <linux/module.h>
11 #include <linux/spinlock.h>
12 #include <linux/err.h>
13 #include <linux/gpio/driver.h>
14 #include <linux/platform_device.h>
15 #include <linux/bitops.h>
16 #include <asm/types.h>
17
18 enum loongson_gpio_mode {
19 BIT_CTRL_MODE,
20 BYTE_CTRL_MODE,
21 };
22
23 struct loongson_gpio_chip_data {
24 const char *label;
25 enum loongson_gpio_mode mode;
26 unsigned int conf_offset;
27 unsigned int out_offset;
28 unsigned int in_offset;
29 unsigned int inten_offset;
30 };
31
32 struct loongson_gpio_chip {
33 struct gpio_chip chip;
34 spinlock_t lock;
35 void __iomem *reg_base;
36 const struct loongson_gpio_chip_data *chip_data;
37 };
38
to_loongson_gpio_chip(struct gpio_chip * chip)39 static inline struct loongson_gpio_chip *to_loongson_gpio_chip(struct gpio_chip *chip)
40 {
41 return container_of(chip, struct loongson_gpio_chip, chip);
42 }
43
loongson_commit_direction(struct loongson_gpio_chip * lgpio,unsigned int pin,int input)44 static inline void loongson_commit_direction(struct loongson_gpio_chip *lgpio, unsigned int pin,
45 int input)
46 {
47 u8 bval = input ? 1 : 0;
48
49 writeb(bval, lgpio->reg_base + lgpio->chip_data->conf_offset + pin);
50 }
51
loongson_commit_level(struct loongson_gpio_chip * lgpio,unsigned int pin,int high)52 static void loongson_commit_level(struct loongson_gpio_chip *lgpio, unsigned int pin, int high)
53 {
54 u8 bval = high ? 1 : 0;
55
56 writeb(bval, lgpio->reg_base + lgpio->chip_data->out_offset + pin);
57 }
58
loongson_gpio_direction_input(struct gpio_chip * chip,unsigned int pin)59 static int loongson_gpio_direction_input(struct gpio_chip *chip, unsigned int pin)
60 {
61 unsigned long flags;
62 struct loongson_gpio_chip *lgpio = to_loongson_gpio_chip(chip);
63
64 spin_lock_irqsave(&lgpio->lock, flags);
65 loongson_commit_direction(lgpio, pin, 1);
66 spin_unlock_irqrestore(&lgpio->lock, flags);
67
68 return 0;
69 }
70
loongson_gpio_direction_output(struct gpio_chip * chip,unsigned int pin,int value)71 static int loongson_gpio_direction_output(struct gpio_chip *chip, unsigned int pin, int value)
72 {
73 unsigned long flags;
74 struct loongson_gpio_chip *lgpio = to_loongson_gpio_chip(chip);
75
76 spin_lock_irqsave(&lgpio->lock, flags);
77 loongson_commit_level(lgpio, pin, value);
78 loongson_commit_direction(lgpio, pin, 0);
79 spin_unlock_irqrestore(&lgpio->lock, flags);
80
81 return 0;
82 }
83
loongson_gpio_get(struct gpio_chip * chip,unsigned int pin)84 static int loongson_gpio_get(struct gpio_chip *chip, unsigned int pin)
85 {
86 u8 bval;
87 int val;
88 struct loongson_gpio_chip *lgpio = to_loongson_gpio_chip(chip);
89
90 bval = readb(lgpio->reg_base + lgpio->chip_data->in_offset + pin);
91 val = bval & 1;
92
93 return val;
94 }
95
loongson_gpio_get_direction(struct gpio_chip * chip,unsigned int pin)96 static int loongson_gpio_get_direction(struct gpio_chip *chip, unsigned int pin)
97 {
98 u8 bval;
99 struct loongson_gpio_chip *lgpio = to_loongson_gpio_chip(chip);
100
101 bval = readb(lgpio->reg_base + lgpio->chip_data->conf_offset + pin);
102 if (bval & 1)
103 return GPIO_LINE_DIRECTION_IN;
104
105 return GPIO_LINE_DIRECTION_OUT;
106 }
107
loongson_gpio_set(struct gpio_chip * chip,unsigned int pin,int value)108 static int loongson_gpio_set(struct gpio_chip *chip, unsigned int pin, int value)
109 {
110 unsigned long flags;
111 struct loongson_gpio_chip *lgpio = to_loongson_gpio_chip(chip);
112
113 spin_lock_irqsave(&lgpio->lock, flags);
114 loongson_commit_level(lgpio, pin, value);
115 spin_unlock_irqrestore(&lgpio->lock, flags);
116
117 return 0;
118 }
119
loongson_gpio_to_irq(struct gpio_chip * chip,unsigned int offset)120 static int loongson_gpio_to_irq(struct gpio_chip *chip, unsigned int offset)
121 {
122 unsigned int u;
123 struct platform_device *pdev = to_platform_device(chip->parent);
124 struct loongson_gpio_chip *lgpio = to_loongson_gpio_chip(chip);
125
126 if (lgpio->chip_data->mode == BIT_CTRL_MODE) {
127 /* Get the register index from offset then multiply by bytes per register */
128 u = readl(lgpio->reg_base + lgpio->chip_data->inten_offset + (offset / 32) * 4);
129 u |= BIT(offset % 32);
130 writel(u, lgpio->reg_base + lgpio->chip_data->inten_offset + (offset / 32) * 4);
131 } else {
132 writeb(1, lgpio->reg_base + lgpio->chip_data->inten_offset + offset);
133 }
134
135 return platform_get_irq(pdev, offset);
136 }
137
loongson_gpio_init(struct device * dev,struct loongson_gpio_chip * lgpio,void __iomem * reg_base)138 static int loongson_gpio_init(struct device *dev, struct loongson_gpio_chip *lgpio,
139 void __iomem *reg_base)
140 {
141 int ret;
142
143 lgpio->reg_base = reg_base;
144 if (lgpio->chip_data->mode == BIT_CTRL_MODE) {
145 ret = bgpio_init(&lgpio->chip, dev, 8,
146 lgpio->reg_base + lgpio->chip_data->in_offset,
147 lgpio->reg_base + lgpio->chip_data->out_offset,
148 NULL, NULL,
149 lgpio->reg_base + lgpio->chip_data->conf_offset,
150 0);
151 if (ret) {
152 dev_err(dev, "unable to init generic GPIO\n");
153 return ret;
154 }
155 } else {
156 lgpio->chip.direction_input = loongson_gpio_direction_input;
157 lgpio->chip.get = loongson_gpio_get;
158 lgpio->chip.get_direction = loongson_gpio_get_direction;
159 lgpio->chip.direction_output = loongson_gpio_direction_output;
160 lgpio->chip.set_rv = loongson_gpio_set;
161 lgpio->chip.parent = dev;
162 spin_lock_init(&lgpio->lock);
163 }
164
165 lgpio->chip.label = lgpio->chip_data->label;
166 lgpio->chip.can_sleep = false;
167 if (lgpio->chip_data->inten_offset)
168 lgpio->chip.to_irq = loongson_gpio_to_irq;
169
170 return devm_gpiochip_add_data(dev, &lgpio->chip, lgpio);
171 }
172
loongson_gpio_probe(struct platform_device * pdev)173 static int loongson_gpio_probe(struct platform_device *pdev)
174 {
175 void __iomem *reg_base;
176 struct loongson_gpio_chip *lgpio;
177 struct device *dev = &pdev->dev;
178
179 lgpio = devm_kzalloc(dev, sizeof(*lgpio), GFP_KERNEL);
180 if (!lgpio)
181 return -ENOMEM;
182
183 lgpio->chip_data = device_get_match_data(dev);
184
185 reg_base = devm_platform_ioremap_resource(pdev, 0);
186 if (IS_ERR(reg_base))
187 return PTR_ERR(reg_base);
188
189 return loongson_gpio_init(dev, lgpio, reg_base);
190 }
191
192 static const struct loongson_gpio_chip_data loongson_gpio_ls2k_data = {
193 .label = "ls2k_gpio",
194 .mode = BIT_CTRL_MODE,
195 .conf_offset = 0x0,
196 .in_offset = 0x20,
197 .out_offset = 0x10,
198 .inten_offset = 0x30,
199 };
200
201 static const struct loongson_gpio_chip_data loongson_gpio_ls2k0500_data0 = {
202 .label = "ls2k0500_gpio",
203 .mode = BIT_CTRL_MODE,
204 .conf_offset = 0x0,
205 .in_offset = 0x8,
206 .out_offset = 0x10,
207 .inten_offset = 0xb0,
208 };
209
210 static const struct loongson_gpio_chip_data loongson_gpio_ls2k0500_data1 = {
211 .label = "ls2k0500_gpio",
212 .mode = BIT_CTRL_MODE,
213 .conf_offset = 0x0,
214 .in_offset = 0x8,
215 .out_offset = 0x10,
216 .inten_offset = 0x98,
217 };
218
219 static const struct loongson_gpio_chip_data loongson_gpio_ls2k2000_data0 = {
220 .label = "ls2k2000_gpio",
221 .mode = BIT_CTRL_MODE,
222 .conf_offset = 0x0,
223 .in_offset = 0xc,
224 .out_offset = 0x8,
225 .inten_offset = 0x14,
226 };
227
228 static const struct loongson_gpio_chip_data loongson_gpio_ls2k2000_data1 = {
229 .label = "ls2k2000_gpio",
230 .mode = BIT_CTRL_MODE,
231 .conf_offset = 0x0,
232 .in_offset = 0x20,
233 .out_offset = 0x10,
234 .inten_offset = 0x30,
235 };
236
237 static const struct loongson_gpio_chip_data loongson_gpio_ls2k2000_data2 = {
238 .label = "ls2k2000_gpio",
239 .mode = BIT_CTRL_MODE,
240 .conf_offset = 0x4,
241 .in_offset = 0x8,
242 .out_offset = 0x0,
243 };
244
245 static const struct loongson_gpio_chip_data loongson_gpio_ls3a5000_data = {
246 .label = "ls3a5000_gpio",
247 .mode = BIT_CTRL_MODE,
248 .conf_offset = 0x0,
249 .in_offset = 0xc,
250 .out_offset = 0x8,
251 .inten_offset = 0x14,
252 };
253
254 static const struct loongson_gpio_chip_data loongson_gpio_ls7a_data = {
255 .label = "ls7a_gpio",
256 .mode = BYTE_CTRL_MODE,
257 .conf_offset = 0x800,
258 .in_offset = 0xa00,
259 .out_offset = 0x900,
260 .inten_offset = 0xb00,
261 };
262
263 /* LS7A2000 chipset GPIO */
264 static const struct loongson_gpio_chip_data loongson_gpio_ls7a2000_data0 = {
265 .label = "ls7a2000_gpio",
266 .mode = BYTE_CTRL_MODE,
267 .conf_offset = 0x800,
268 .in_offset = 0xa00,
269 .out_offset = 0x900,
270 .inten_offset = 0xb00,
271 };
272
273 /* LS7A2000 ACPI GPIO */
274 static const struct loongson_gpio_chip_data loongson_gpio_ls7a2000_data1 = {
275 .label = "ls7a2000_gpio",
276 .mode = BIT_CTRL_MODE,
277 .conf_offset = 0x4,
278 .in_offset = 0x8,
279 .out_offset = 0x0,
280 };
281
282 /* Loongson-3A6000 node GPIO */
283 static const struct loongson_gpio_chip_data loongson_gpio_ls3a6000_data = {
284 .label = "ls3a6000_gpio",
285 .mode = BIT_CTRL_MODE,
286 .conf_offset = 0x0,
287 .in_offset = 0xc,
288 .out_offset = 0x8,
289 .inten_offset = 0x14,
290 };
291
292 static const struct of_device_id loongson_gpio_of_match[] = {
293 {
294 .compatible = "loongson,ls2k-gpio",
295 .data = &loongson_gpio_ls2k_data,
296 },
297 {
298 .compatible = "loongson,ls2k0500-gpio0",
299 .data = &loongson_gpio_ls2k0500_data0,
300 },
301 {
302 .compatible = "loongson,ls2k0500-gpio1",
303 .data = &loongson_gpio_ls2k0500_data1,
304 },
305 {
306 .compatible = "loongson,ls2k2000-gpio0",
307 .data = &loongson_gpio_ls2k2000_data0,
308 },
309 {
310 .compatible = "loongson,ls2k2000-gpio1",
311 .data = &loongson_gpio_ls2k2000_data1,
312 },
313 {
314 .compatible = "loongson,ls2k2000-gpio2",
315 .data = &loongson_gpio_ls2k2000_data2,
316 },
317 {
318 .compatible = "loongson,ls3a5000-gpio",
319 .data = &loongson_gpio_ls3a5000_data,
320 },
321 {
322 .compatible = "loongson,ls7a-gpio",
323 .data = &loongson_gpio_ls7a_data,
324 },
325 {
326 .compatible = "loongson,ls7a2000-gpio1",
327 .data = &loongson_gpio_ls7a2000_data0,
328 },
329 {
330 .compatible = "loongson,ls7a2000-gpio2",
331 .data = &loongson_gpio_ls7a2000_data1,
332 },
333 {
334 .compatible = "loongson,ls3a6000-gpio",
335 .data = &loongson_gpio_ls3a6000_data,
336 },
337 {}
338 };
339 MODULE_DEVICE_TABLE(of, loongson_gpio_of_match);
340
341 static const struct acpi_device_id loongson_gpio_acpi_match[] = {
342 {
343 .id = "LOON0002",
344 .driver_data = (kernel_ulong_t)&loongson_gpio_ls7a_data,
345 },
346 {
347 .id = "LOON0007",
348 .driver_data = (kernel_ulong_t)&loongson_gpio_ls3a5000_data,
349 },
350 {
351 .id = "LOON000A",
352 .driver_data = (kernel_ulong_t)&loongson_gpio_ls2k2000_data0,
353 },
354 {
355 .id = "LOON000B",
356 .driver_data = (kernel_ulong_t)&loongson_gpio_ls2k2000_data1,
357 },
358 {
359 .id = "LOON000C",
360 .driver_data = (kernel_ulong_t)&loongson_gpio_ls2k2000_data2,
361 },
362 {
363 .id = "LOON000D",
364 .driver_data = (kernel_ulong_t)&loongson_gpio_ls7a2000_data0,
365 },
366 {
367 .id = "LOON000E",
368 .driver_data = (kernel_ulong_t)&loongson_gpio_ls7a2000_data1,
369 },
370 {
371 .id = "LOON000F",
372 .driver_data = (kernel_ulong_t)&loongson_gpio_ls3a6000_data,
373 },
374 {}
375 };
376 MODULE_DEVICE_TABLE(acpi, loongson_gpio_acpi_match);
377
378 static struct platform_driver loongson_gpio_driver = {
379 .driver = {
380 .name = "loongson-gpio",
381 .of_match_table = loongson_gpio_of_match,
382 .acpi_match_table = loongson_gpio_acpi_match,
383 },
384 .probe = loongson_gpio_probe,
385 };
386
loongson_gpio_setup(void)387 static int __init loongson_gpio_setup(void)
388 {
389 return platform_driver_register(&loongson_gpio_driver);
390 }
391 postcore_initcall(loongson_gpio_setup);
392
393 MODULE_DESCRIPTION("Loongson gpio driver");
394 MODULE_LICENSE("GPL");
395