Searched hist:"5 c992afcf8e4f91fac05d39b86c7f7922a50145c" (Results 1 – 6 of 6) sorted by relevance
| /linux/include/dt-bindings/clock/ |
| H A D | tegra124-car.h | diff 5c992afcf8e4f91fac05d39b86c7f7922a50145c Thu May 15 02:32:59 CEST 2014 Andrew Bresticker <abrestic@chromium.org> clk: tegra: Fix xusb_hs_src clock hierarchy
Currently the Tegra1x4 clock init code hard-codes the mux setting
for xusb_hs_src and treats it as a fixed-factor clock. It is,
however, a mux which can be parented by either xusb_ss_src/2 or
pll_u_60M. Add the fixed-factor clock xusb_ss_div2 and put an
entry in periph_clks[] for the xusb_hs_src mux.
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
|
| H A D | tegra114-car.h | diff 5c992afcf8e4f91fac05d39b86c7f7922a50145c Thu May 15 02:32:59 CEST 2014 Andrew Bresticker <abrestic@chromium.org> clk: tegra: Fix xusb_hs_src clock hierarchy
Currently the Tegra1x4 clock init code hard-codes the mux setting
for xusb_hs_src and treats it as a fixed-factor clock. It is,
however, a mux which can be parented by either xusb_ss_src/2 or
pll_u_60M. Add the fixed-factor clock xusb_ss_div2 and put an
entry in periph_clks[] for the xusb_hs_src mux.
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
|
| /linux/drivers/clk/tegra/ |
| H A D | clk-id.h | diff 5c992afcf8e4f91fac05d39b86c7f7922a50145c Thu May 15 02:32:59 CEST 2014 Andrew Bresticker <abrestic@chromium.org> clk: tegra: Fix xusb_hs_src clock hierarchy
Currently the Tegra1x4 clock init code hard-codes the mux setting
for xusb_hs_src and treats it as a fixed-factor clock. It is,
however, a mux which can be parented by either xusb_ss_src/2 or
pll_u_60M. Add the fixed-factor clock xusb_ss_div2 and put an
entry in periph_clks[] for the xusb_hs_src mux.
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
|
| H A D | clk-tegra-periph.c | diff 5c992afcf8e4f91fac05d39b86c7f7922a50145c Thu May 15 02:32:59 CEST 2014 Andrew Bresticker <abrestic@chromium.org> clk: tegra: Fix xusb_hs_src clock hierarchy
Currently the Tegra1x4 clock init code hard-codes the mux setting
for xusb_hs_src and treats it as a fixed-factor clock. It is,
however, a mux which can be parented by either xusb_ss_src/2 or
pll_u_60M. Add the fixed-factor clock xusb_ss_div2 and put an
entry in periph_clks[] for the xusb_hs_src mux.
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
|
| H A D | clk-tegra124.c | diff 5c992afcf8e4f91fac05d39b86c7f7922a50145c Thu May 15 02:32:59 CEST 2014 Andrew Bresticker <abrestic@chromium.org> clk: tegra: Fix xusb_hs_src clock hierarchy
Currently the Tegra1x4 clock init code hard-codes the mux setting
for xusb_hs_src and treats it as a fixed-factor clock. It is,
however, a mux which can be parented by either xusb_ss_src/2 or
pll_u_60M. Add the fixed-factor clock xusb_ss_div2 and put an
entry in periph_clks[] for the xusb_hs_src mux.
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
|
| H A D | clk-tegra114.c | diff 5c992afcf8e4f91fac05d39b86c7f7922a50145c Thu May 15 02:32:59 CEST 2014 Andrew Bresticker <abrestic@chromium.org> clk: tegra: Fix xusb_hs_src clock hierarchy
Currently the Tegra1x4 clock init code hard-codes the mux setting
for xusb_hs_src and treats it as a fixed-factor clock. It is,
however, a mux which can be parented by either xusb_ss_src/2 or
pll_u_60M. Add the fixed-factor clock xusb_ss_div2 and put an
entry in periph_clks[] for the xusb_hs_src mux.
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
|