Searched hist:"13136 a47a061c01c91df78b37f7708dd5ce7035f" (Results 1 – 2 of 2) sorted by relevance
| /linux/include/soc/tegra/ |
| H A D | pmc.h | diff 13136a47a061c01c91df78b37f7708dd5ce7035f Fri Aug 10 20:08:07 CEST 2018 Aapo Vienamo <avienamo@nvidia.com> soc/tegra: pmc: Fix pad voltage configuration for Tegra186
Implement support for the PMC_IMPL_E_33V_PWR register which replaces
PMC_PWR_DET register interface of the SoC generations preceding
Tegra186. Also add the voltage bit offsets to the tegra186_io_pads[]
table and the AO_HV pad.
Signed-off-by: Aapo Vienamo <avienamo@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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| /linux/drivers/soc/tegra/ |
| H A D | pmc.c | diff 13136a47a061c01c91df78b37f7708dd5ce7035f Fri Aug 10 20:08:07 CEST 2018 Aapo Vienamo <avienamo@nvidia.com> soc/tegra: pmc: Fix pad voltage configuration for Tegra186
Implement support for the PMC_IMPL_E_33V_PWR register which replaces
PMC_PWR_DET register interface of the SoC generations preceding
Tegra186. Also add the voltage bit offsets to the tegra186_io_pads[]
table and the AO_HV pad.
Signed-off-by: Aapo Vienamo <avienamo@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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