Home
last modified time | relevance | path

Searched +full:xip8001b +full:- +full:trng (Results 1 – 2 of 2) sorted by relevance

/linux/Documentation/devicetree/bindings/rng/
H A Dxiphera,xip8001b-trng.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/rng/xiphera,xip8001b-trng.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Xiphera XIP8001B-trng
10 - Atte Tommiska <atte.tommiska@xiphera.com>
13 Xiphera FPGA-based true random number generator intellectual property core.
17 const: xiphera,xip8001b-trng
23 - compatible
24 - reg
[all …]
/linux/drivers/char/hw_random/
H A Dxiphera-trng.c1 // SPDX-License-Identifier: GPL-2.0
24 /* trng statuses */
37 struct xiphera_trng *trng = container_of(rng, struct xiphera_trng, rng); in xiphera_trng_read() local
42 if (readl(trng->mem + STATUS_REG) == TRNG_NEW_RAND_AVAILABLE) { in xiphera_trng_read()
43 *(u32 *)buf = readl(trng->mem + RAND_REG); in xiphera_trng_read()
45 * Inform the trng of the read in xiphera_trng_read()
46 * and re-enable it to produce a new random number in xiphera_trng_read()
48 writel(HOST_TO_TRNG_READ, trng->mem + CONTROL_REG); in xiphera_trng_read()
49 writel(HOST_TO_TRNG_ENABLE, trng->mem + CONTROL_REG); in xiphera_trng_read()
52 max -= sizeof(u32); in xiphera_trng_read()
[all …]