/linux/Documentation/devicetree/bindings/regulator/ |
H A D | active-semi,act8865.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/regulator/active-semi,act8865.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Active-semi ACT8865 regulator 10 - Paul Cercueil <paul@crapouillou.net> 14 const: active-semi,act8865 19 system-power-controller: 25 active-semi,vsel-high: 27 Indicates the VSEL pin is high. If this property is missing, [all …]
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H A D | silergy,sy8827n.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Jisheng Zhang <jszhang@kernel.org> 15 - silergy,sy8827n 20 enable-gpios: 24 silergy,vsel-state-high: 27 Indicates if the VSEL pin is set to high. 28 If this property is missing, assume the VSEL pin is set to low. 31 - compatible [all …]
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H A D | richtek,rtq2134-regulator.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/regulator/richtek,rtq2134-regulator.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - ChiYuan Huang <cy_huang@richtek.com> 13 The RTQ2134 is a multi-phase, programmable power management IC that 14 integrates with four high efficient, synchronous step-down converter cores. 17 https://www.richtek.com/assets/product_file/RTQ2134-QA/DSQ2134-QA-01.pdf 22 - richtek,rtq2134 31 "^buck[1-3]$": [all …]
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H A D | active-semi,act8945a.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/regulator/active-semi,act8945a.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Active-semi ACT8945a regulator 10 - Paul Cercueil <paul@crapouillou.net> 14 const: active-semi,act8945a 19 system-power-controller: 25 active-semi,vsel-high: 27 Indicates the VSEL pin is high. If this property is missing, [all …]
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/linux/drivers/regulator/ |
H A D | rt4803.c | 1 // SPDX-License-Identifier: GPL-2.0-only 51 return -EINVAL; in rt4803_set_mode() 54 modeval <<= ffs(RT4803_MODE_MASK) - 1; in rt4803_set_mode() 69 modeval >>= ffs(RT4803_MODE_MASK) - 1; in rt4803_get_mode() 84 unsigned int state, events = 0; in rt4803_get_error_flags() local 87 ret = regmap_read(regmap, RT4803_REG_STAT, &state); in rt4803_get_error_flags() 91 if (state & RT4803_PGOOD_MASK) in rt4803_get_error_flags() 94 if (state & RT4803_FAULT_MASK) in rt4803_get_error_flags() 97 if (state & RT4803_HOTDIE_MASK) in rt4803_get_error_flags() 100 if (state & RT4803_TSD_MASK) in rt4803_get_error_flags() [all …]
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H A D | wm831x-dcdc.c | 1 // SPDX-License-Identifier: GPL-2.0+ 3 // wm831x-dcdc.c -- DC-DC buck converter driver for the WM831x series 63 struct wm831x *wm831x = dcdc->wm831x; in wm831x_dcdc_get_mode() 64 u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG; in wm831x_dcdc_get_mode() 84 return -EINVAL; in wm831x_dcdc_get_mode() 107 return -EINVAL; in wm831x_dcdc_set_mode_int() 117 struct wm831x *wm831x = dcdc->wm831x; in wm831x_dcdc_set_mode() 118 u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG; in wm831x_dcdc_set_mode() 127 struct wm831x *wm831x = dcdc->wm831x; in wm831x_dcdc_set_suspend_mode() 128 u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL; in wm831x_dcdc_set_suspend_mode() [all …]
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H A D | tps62360-regulator.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * tps62360.c -- TI tps62360 72 * - If it is already there then it will make that register as most 76 * - If requested voltage is not found then it will use the least 86 int new_vset_reg = tps->lru_index[3]; in find_voltage_set_register() 90 if (tps->curr_vset_vsel[tps->lru_index[i]] == req_vsel) { in find_voltage_set_register() 91 new_vset_reg = tps->lru_index[i]; in find_voltage_set_register() 99 for (i = found_index; i > 0; i--) in find_voltage_set_register() 100 tps->lru_index[i] = tps->lru_index[i - 1]; in find_voltage_set_register() 102 tps->lru_index[0] = new_vset_reg; in find_voltage_set_register() [all …]
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H A D | sy8827n.c | 1 // SPDX-License-Identifier: GPL-2.0 45 regmap_update_bits(rdev->regmap, di->vsel_reg, in sy8827n_set_mode() 49 regmap_update_bits(rdev->regmap, di->vsel_reg, in sy8827n_set_mode() 53 return -EINVAL; in sy8827n_set_mode() 64 ret = regmap_read(rdev->regmap, di->vsel_reg, &val); in sy8827n_get_mode() 89 struct regulator_desc *rdesc = &di->desc; in sy8827n_regulator_register() 92 rdesc->name = "sy8827n-reg"; in sy8827n_regulator_register() 93 rdesc->supply_name = "vin"; in sy8827n_regulator_register() 94 rdesc->ops = &sy8827n_regulator_ops; in sy8827n_regulator_register() 95 rdesc->type = REGULATOR_VOLTAGE; in sy8827n_regulator_register() [all …]
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H A D | max8973-regulator.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * max8973-regulator.c -- Maxim max8973A 5 * Regulator driver for MAXIM 8973A DC-DC step-down switching regulator. 21 #include <linux/regulator/max8973-regulator.h> 121 * - If it is already there then it will make that register as most 125 * - If requested voltage is not found then it will use the least 135 int new_vout_reg = tps->lru_index[MAX8973_MAX_VOUT_REG - 1]; in find_voltage_set_register() 136 int found_index = MAX8973_MAX_VOUT_REG - 1; in find_voltage_set_register() 139 if (tps->curr_vout_val[tps->lru_index[i]] == req_vsel) { in find_voltage_set_register() 140 new_vout_reg = tps->lru_index[i]; in find_voltage_set_register() [all …]
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H A D | lp872x.c | 1 // SPDX-License-Identifier: GPL-2.0-only 92 /* dump registers in regmap-debugfs */ 160 ret = regmap_read(lp->regmap, addr, &val); in lp872x_read_byte() 162 dev_err(lp->dev, "failed to read 0x%.2x\n", addr); in lp872x_read_byte() 172 return regmap_write(lp->regmap, addr, data); in lp872x_write_byte() 178 return regmap_update_bits(lp->regmap, addr, mask, data); in lp872x_update_bits() 183 enum lp872x_id chip = lp->chipid; in lp872x_get_timestep_usec() 203 return -EINVAL; in lp872x_get_timestep_usec() 212 return -EINVAL; in lp872x_get_timestep_usec() 233 addr = LP872X_LDO1_VOUT + rid - LP8725_ID_BASE; in lp872x_regulator_enable_time() [all …]
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/linux/arch/arm64/boot/dts/rockchip/ |
H A D | rk3399-evb-ind.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 11 compatible = "rockchip,rk3399-evb-ind", "rockchip,rk3399"; 19 stdout-path = "serial2:1500000n8"; 22 vcc5v0_sys: regulator-vcc5v0-sys { 23 compatible = "regulator-fixed"; 24 enable-active-high; 26 regulator-name = "vcc5v0_sys"; 27 regulator-always-on; 28 regulator-boot-on; [all …]
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H A D | rk3399-rock-4c-plus.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 /dts-v1/; 9 #include <dt-bindings/leds/common.h> 10 #include "rk3399-t.dtsi" 14 compatible = "radxa,rock-4c-plus", "rockchip,rk3399"; 23 stdout-path = "serial2:1500000n8"; 26 clkin_gmac: external-gmac-clock { 27 compatible = "fixed-clock"; 28 clock-frequency = <125000000>; 29 clock-output-names = "clkin_gmac"; [all …]
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/linux/arch/arm64/boot/dts/freescale/ |
H A D | imx93-kontron-osm-s.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 6 #include <dt-bindings/interrupt-controller/irq.h> 10 model = "Kontron OSM-S i.MX93"; 11 compatible = "kontron,imx93-osm-s", "fsl,imx93"; 24 stdout-path = &lpuart1; 27 reg_usdhc2_vcc: regulator-usdhc2-vcc { 28 compatible = "regulator-fixed"; 29 pinctrl-names = "default"; 30 pinctrl-0 = <&pinctrl_reg_usdhc2_vcc>; 32 enable-active-high; [all …]
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H A D | imx8mm-kontron-osm-s.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 6 #include <dt-bindings/gpio/gpio.h> 7 #include <dt-bindings/interrupt-controller/irq.h> 11 model = "Kontron OSM-S i.MX8MM (N802X SOM)"; 12 compatible = "kontron,imx8mm-osm-s", "fsl,imx8mm"; 30 stdout-path = &uart3; 33 reg_vdd_carrier: regulator-vdd-carrier { 34 compatible = "regulator-fixed"; 35 pinctrl-names = "default"; 36 pinctrl-0 = <&pinctrl_reg_vdd_carrier>; [all …]
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H A D | imx8mp-kontron-osm-s.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 6 #include <dt-bindings/interrupt-controller/irq.h> 10 model = "Kontron OSM-S i.MX8MP"; 11 compatible = "kontron,imx8mp-osm-s", "fsl,imx8mp"; 29 stdout-path = &uart3; 32 reg_usb1_vbus: regulator-usb1-vbus { 33 compatible = "regulator-fixed"; 34 pinctrl-names = "default"; 35 pinctrl-0 = <&pinctrl_reg_usb1_vbus>; 37 enable-active-high; [all …]
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/linux/arch/arm/boot/dts/microchip/ |
H A D | at91-sama5d2_xplained.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * at91-sama5d2_xplained.dts - Device Tree file for SAMA5D2 Xplained board 8 /dts-v1/; 10 #include "sama5d2-pinfunc.h" 11 #include <dt-bindings/mfd/atmel-flexcom.h> 12 #include <dt-bindings/gpio/gpio.h> 13 #include <dt-bindings/input/input.h> 14 #include <dt-bindings/regulator/active-semi,8945a-regulator.h> 18 compatible = "atmel,sama5d2-xplained", "atmel,sama5d2", "atmel,sama5"; 28 stdout-path = "serial0:115200n8"; [all …]
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/linux/drivers/clk/tegra/ |
H A D | clk-dfll.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * clk-dfll.c - Tegra DFLL clock source common code 5 * Copyright (C) 2012-2019 NVIDIA Corporation. All rights reserved. 12 * "CL-DVFS". To try to avoid confusion, this code refers to them 18 * DFLL can be operated in either open-loop mode or closed-loop mode. 19 * In open-loop mode, the DFLL generates an output clock appropriate 20 * to the supply voltage. In closed-loop mode, when configured with a 27 * performance-measurement code and any code that relies on the CPU 32 #include <linux/clk-provider.h> 49 #include "clk-dfll.h" [all …]
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/linux/drivers/media/pci/ttpci/ |
H A D | budget.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 10 * Copyright (C) 1999-2002 Ralph Metzler 46 static void Set22K(struct budget *budget, int state) in Set22K() argument 48 struct saa7146_dev *dev = budget->dev; in Set22K() 51 saa7146_setgpio(dev, 3, (state ? SAA7146_GPIO_OUTHI : SAA7146_GPIO_OUTLO)); in Set22K() 62 struct saa7146_dev *dev = budget->dev; in DiseqcSendBit() 78 for (i = 7; i >= 0; i--) { in DiseqcSendByte() 89 struct saa7146_dev *dev = budget->dev; in SendDiSEqCMsg() 102 if (burst != -1) { in SendDiSEqCMsg() 121 * GPIO 1: LNBP EN, GPIO 2: LNBP VSEL [all …]
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