Searched full:vp_add (Results 1 – 10 of 10) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/include/llvm/IR/ |
| H A D | VPIntrinsics.def | 41 // \p VPSD The SelectionDAG Node id (eg VP_ADD). 69 // \p VPID The canonical name (eg `vp_add`, which at the same time is the 73 // \p VPSD The SelectionDAG Node id (eg VP_ADD). 143 HELPER_REGISTER_BINARY_INT_VP(vp_add, VP_ADD, Add, ADD)
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| /freebsd/contrib/llvm-project/llvm/lib/Target/VE/ |
| H A D | VVPInstrInfo.td | 57 def SDTIntBinOpVVP : SDTypeProfile<1, 4, [ // vp_add, vp_and, etc.
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | SDPatternMatch.h | 29 /// in normal circumstances, but matches VP_ADD nodes under a custom
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| H A D | TargetLowering.h | 440 /// ISD::VP_ADD, ISD::VP_SUB, etc. It must be a legal scalar integer type,
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVTargetTransformInfo.cpp | 2800 case Intrinsic::vp_add: in canSplatOperand()
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| H A D | RISCVISelLowering.cpp | 733 ISD::VP_ADD, ISD::VP_SUB, ISD::VP_MUL, in RISCVTargetLowering() 7005 VP_CASE(ADD) // VP_ADD in getRISCVVLOp() 8235 case ISD::VP_ADD: in LowerOperation() 17951 // Shifted value should be a vp_add with same mask and VL. in performVP_TRUNCATECombine() 17953 if (LHS.getOpcode() != ISD::VP_ADD || LHS.getOperand(2) != Mask || in performVP_TRUNCATECombine() 17959 // Matches another VP_ADD with same VL and Mask. in performVP_TRUNCATECombine() 17961 if (V.getOpcode() != ISD::VP_ADD || V.getOperand(2) != Mask || in performVP_TRUNCATECombine() 17971 // We need to find another VP_ADD in one of the operands. in performVP_TRUNCATECombine()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeIntegerTypes.cpp | 209 case ISD::VP_ADD: in PromoteIntegerResult() 1671 Amt = DAG.getNode(ISD::VP_ADD, DL, AmtVT, Amt, ShiftOffset, Mask, EVL); in PromoteIntRes_VPFunnelShift()
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| H A D | LegalizeVectorTypes.cpp | 1289 case ISD::ADD: case ISD::VP_ADD: in SplitVectorResult() 4734 case ISD::ADD: case ISD::VP_ADD: in WidenVectorResult()
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| H A D | TargetLowering.cpp | 9350 Op = DAG.getNode(ISD::VP_ADD, dl, VT, Tmp2, Tmp3, Mask, VL); in expandVPCTPOP() 9355 Tmp5 = DAG.getNode(ISD::VP_ADD, dl, VT, Op, Tmp4, Mask, VL); in expandVPCTPOP() 9372 V = DAG.getNode(ISD::VP_ADD, dl, VT, V, in expandVPCTPOP()
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| H A D | SelectionDAG.cpp | 10628 case ISD::VP_ADD: in getNode() 10630 // If it is VP_ADD/VP_SUB mask operation then turn it to VP_XOR in getNode()
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