xref: /freebsd/sys/contrib/device-tree/src/arm/renesas/r8a7742-iwg21d-q7-dbcm-ca.dts (revision 69ed3df4f588860308677cda76cbcce1f19a54c9) 
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the iWave-RZ/G1H Qseven board development
4 * platform with camera daughter board
5 *
6 * Copyright (C) 2020 Renesas Electronics Corp.
7 */
8
9/dts-v1/;
10
11#include <dt-bindings/media/video-interfaces.h>
12
13#include "r8a7742-iwg21d-q7.dts"
14
15/ {
16	model = "iWave Systems RZ/G1H Qseven development platform with camera add-on";
17	compatible = "iwave,g21d", "iwave,g21m", "renesas,r8a7742";
18
19	aliases {
20		serial0 = &scif0;
21		serial1 = &scif1;
22		serial3 = &scifb1;
23		serial5 = &hscif0;
24		ethernet1 = &ether;
25	};
26
27	mclk_cam1: mclk-cam1 {
28		compatible = "fixed-clock";
29		#clock-cells = <0>;
30		clock-frequency = <26000000>;
31	};
32
33	mclk_cam2: mclk-cam2 {
34		compatible = "fixed-clock";
35		#clock-cells = <0>;
36		clock-frequency = <26000000>;
37	};
38
39	mclk_cam3: mclk-cam3 {
40		compatible = "fixed-clock";
41		#clock-cells = <0>;
42		clock-frequency = <26000000>;
43	};
44
45	mclk_cam4: mclk-cam4 {
46		compatible = "fixed-clock";
47		#clock-cells = <0>;
48		clock-frequency = <26000000>;
49	};
50
51	reg_1p8v: 1p8v {
52		compatible = "regulator-fixed";
53		regulator-name = "1P8V";
54		regulator-min-microvolt = <1800000>;
55		regulator-max-microvolt = <1800000>;
56		regulator-always-on;
57	};
58
59	reg_2p8v: 2p8v {
60		compatible = "regulator-fixed";
61		regulator-name = "2P8V";
62		regulator-min-microvolt = <2800000>;
63		regulator-max-microvolt = <2800000>;
64		regulator-always-on;
65	};
66};
67
68&avb {
69	/* Pins shared with VIN0, keep status disabled */
70	status = "disabled";
71};
72
73&can0 {
74	pinctrl-0 = <&can0_pins>;
75	pinctrl-names = "default";
76	status = "okay";
77};
78
79&ether {
80	pinctrl-0 = <&ether_pins>;
81	pinctrl-names = "default";
82
83	phy-handle = <&phy1>;
84	renesas,ether-link-active-low;
85	status = "okay";
86
87	phy1: ethernet-phy@1 {
88		compatible = "ethernet-phy-id0022.1560";
89		reg = <1>;
90		micrel,led-mode = <1>;
91	};
92};
93
94&gpio0 {
95	/* Disable hogging GP0_18 to output LOW */
96	/delete-node/ qspi-en-hog;
97
98	/* Hog GP0_18 to output HIGH to enable VIN2 */
99	vin2-en-hog {
100		gpio-hog;
101		gpios = <18 GPIO_ACTIVE_HIGH>;
102		output-high;
103		line-name = "VIN2_EN";
104	};
105};
106
107&hscif0 {
108	pinctrl-0 = <&hscif0_pins>;
109	pinctrl-names = "default";
110	uart-has-rtscts;
111	status = "okay";
112};
113
114&i2c1 {
115	pinctrl-0 = <&i2c1_pins>;
116	pinctrl-names = "default";
117
118	/* status set to "okay" when needed by camera configuration below */
119	clock-frequency = <400000>;
120};
121
122&i2c3 {
123	pinctrl-0 = <&i2c3_pins>;
124	pinctrl-names = "default";
125
126	/* status set to "okay" when needed by camera configuration below */
127	clock-frequency = <400000>;
128};
129
130&pfc {
131	can0_pins: can0 {
132		groups = "can0_data_d";
133		function = "can0";
134	};
135
136	ether_pins: ether {
137		groups = "eth_mdio", "eth_rmii";
138		function = "eth";
139	};
140
141	hscif0_pins: hscif0 {
142		groups = "hscif0_data", "hscif0_ctrl";
143		function = "hscif0";
144	};
145
146	i2c1_pins: i2c1 {
147		groups = "i2c1_c";
148		function = "i2c1";
149	};
150
151	i2c3_pins: i2c3 {
152		groups = "i2c3";
153		function = "i2c3";
154	};
155
156	scif0_pins: scif0 {
157		groups = "scif0_data";
158		function = "scif0";
159	};
160
161	scif1_pins: scif1 {
162		groups = "scif1_data";
163		function = "scif1";
164	};
165
166	scifb1_pins: scifb1 {
167		groups = "scifb1_data";
168		function = "scifb1";
169	};
170
171	vin0_8bit_pins: vin0 {
172		groups = "vin0_data8", "vin0_clk", "vin0_sync";
173		function = "vin0";
174	};
175
176	vin1_8bit_pins: vin1 {
177		groups = "vin1_data8_b", "vin1_clk_b", "vin1_sync_b";
178		function = "vin1";
179	};
180
181	vin2_pins: vin2 {
182		groups = "vin2_g8", "vin2_clk";
183		function = "vin2";
184	};
185
186	vin3_pins: vin3 {
187		groups = "vin3_data8", "vin3_clk", "vin3_sync";
188		function = "vin3";
189	};
190};
191
192&qspi {
193	/* Pins shared with VIN2, keep status disabled */
194	status = "disabled";
195};
196
197&scif0 {
198	pinctrl-0 = <&scif0_pins>;
199	pinctrl-names = "default";
200	status = "okay";
201};
202
203&scif1 {
204	pinctrl-0 = <&scif1_pins>;
205	pinctrl-names = "default";
206	status = "okay";
207};
208
209&scifb1 {
210	pinctrl-0 = <&scifb1_pins>;
211	pinctrl-names = "default";
212	status = "okay";
213
214	rts-gpios = <&gpio4 21 GPIO_ACTIVE_LOW>;
215	cts-gpios = <&gpio4 17 GPIO_ACTIVE_LOW>;
216};
217
218/*
219 * Below configuration ties VINx endpoints to ov5640/ov7725 camera endpoints
220 *
221 * (un)comment the #include statements to change configuration
222 */
223
224/* 8bit CMOS Camera 1 (J13) */
225#define CAM_PARENT_I2C		i2c0
226#define MCLK_CAM		mclk_cam1
227#define CAM_EP			cam0ep
228#define VIN_EP			vin0ep
229#undef CAM_ENABLED
230#include "r8a7742-iwg21d-q7-dbcm-ov5640-single.dtsi"
231//#include "r8a7742-iwg21d-q7-dbcm-ov7725-single.dtsi"
232
233#ifdef CAM_ENABLED
234&vin0 {
235	/*
236	 * Set SW2 switch on the SOM to 'ON'
237	 * Set SW1 switch on camera board to 'OFF' as we are using 8bit mode
238	 */
239	status = "okay";
240	pinctrl-0 = <&vin0_8bit_pins>;
241	pinctrl-names = "default";
242
243	port {
244		vin0ep: endpoint {
245			remote-endpoint = <&cam0ep>;
246			bus-width = <8>;
247			bus-type = <MEDIA_BUS_TYPE_BT656>;
248		};
249	};
250};
251#endif /* CAM_ENABLED */
252
253#undef CAM_PARENT_I2C
254#undef MCLK_CAM
255#undef CAM_EP
256#undef VIN_EP
257
258/* 8bit CMOS Camera 2 (J14) */
259#define CAM_PARENT_I2C		i2c1
260#define MCLK_CAM		mclk_cam2
261#define CAM_EP			cam1ep
262#define VIN_EP			vin1ep
263#undef CAM_ENABLED
264#include "r8a7742-iwg21d-q7-dbcm-ov5640-single.dtsi"
265//#include "r8a7742-iwg21d-q7-dbcm-ov7725-single.dtsi"
266
267#ifdef CAM_ENABLED
268&vin1 {
269	/* Set SW1 switch on the SOM to 'ON' */
270	status = "okay";
271	pinctrl-0 = <&vin1_8bit_pins>;
272	pinctrl-names = "default";
273
274	port {
275		vin1ep: endpoint {
276			remote-endpoint = <&cam1ep>;
277			bus-width = <8>;
278			bus-type = <MEDIA_BUS_TYPE_BT656>;
279		};
280	};
281};
282
283#endif /* CAM_ENABLED */
284
285#undef CAM_PARENT_I2C
286#undef MCLK_CAM
287#undef CAM_EP
288#undef VIN_EP
289
290/* 8bit CMOS Camera 3 (J12) */
291#define CAM_PARENT_I2C		i2c2
292#define MCLK_CAM		mclk_cam3
293#define CAM_EP			cam2ep
294#define VIN_EP			vin2ep
295#undef CAM_ENABLED
296#include "r8a7742-iwg21d-q7-dbcm-ov5640-single.dtsi"
297//#include "r8a7742-iwg21d-q7-dbcm-ov7725-single.dtsi"
298
299#ifdef CAM_ENABLED
300&vin2 {
301	status = "okay";
302	pinctrl-0 = <&vin2_pins>;
303	pinctrl-names = "default";
304
305	port {
306		vin2ep: endpoint {
307			remote-endpoint = <&cam2ep>;
308			bus-width = <8>;
309			data-shift = <8>;
310			bus-type = <MEDIA_BUS_TYPE_BT656>;
311		};
312	};
313};
314#endif /* CAM_ENABLED */
315
316#undef CAM_PARENT_I2C
317#undef MCLK_CAM
318#undef CAM_EP
319#undef VIN_EP
320
321/* 8bit CMOS Camera 4 (J11) */
322#define CAM_PARENT_I2C		i2c3
323#define MCLK_CAM		mclk_cam4
324#define CAM_EP			cam3ep
325#define VIN_EP			vin3ep
326#undef CAM_ENABLED
327#include "r8a7742-iwg21d-q7-dbcm-ov5640-single.dtsi"
328//#include "r8a7742-iwg21d-q7-dbcm-ov7725-single.dtsi"
329
330#ifdef CAM_ENABLED
331&vin3 {
332	status = "okay";
333	pinctrl-0 = <&vin3_pins>;
334	pinctrl-names = "default";
335
336	port {
337		vin3ep: endpoint {
338			remote-endpoint = <&cam3ep>;
339			bus-width = <8>;
340			bus-type = <MEDIA_BUS_TYPE_BT656>;
341		};
342	};
343};
344#endif /* CAM_ENABLED */
345
346#undef CAM_PARENT_I2C
347#undef MCLK_CAM
348#undef CAM_EP
349#undef VIN_EP
350