1// SPDX-License-Identifier: BSD-3-Clause 2/* 3 * Copyright (c) 2025 Radxa Computer (Shenzhen) Co., Ltd. 4 */ 5 6/dts-v1/; 7 8/* PM7250B is configured to use SID8/9 */ 9#define PM7250B_SID 8 10#define PM7250B_SID1 9 11 12#include <dt-bindings/iio/qcom,spmi-adc7-pmk8350.h> 13#include <dt-bindings/iio/qcom,spmi-adc7-pm7325.h> 14#include <dt-bindings/leds/common.h> 15#include <dt-bindings/pinctrl/qcom,pmic-gpio.h> 16#include <dt-bindings/regulator/qcom,rpmh-regulator.h> 17#include "kodiak.dtsi" 18#include "pm7250b.dtsi" 19#include "pm7325.dtsi" 20#include "pm8350c.dtsi" /* PM7350C */ 21#include "pmk8350.dtsi" /* PMK7325 */ 22#include "qcs6490-audioreach.dtsi" 23 24/delete-node/ &adsp_mem; 25/delete-node/ &cdsp_mem; 26/delete-node/ &ipa_fw_mem; 27/delete-node/ &mpss_mem; 28/delete-node/ &remoteproc_mpss; 29/delete-node/ &remoteproc_wpss; 30/delete-node/ &rmtfs_mem; 31/delete-node/ &video_mem; 32/delete-node/ &wifi; 33/delete-node/ &wlan_ce_mem; 34/delete-node/ &wlan_fw_mem; 35/delete-node/ &wpss_mem; 36/delete-node/ &xbl_mem; 37 38/ { 39 model = "Radxa Dragon Q6A"; 40 compatible = "radxa,dragon-q6a", "qcom,qcm6490"; 41 chassis-type = "embedded"; 42 43 aliases { 44 mmc0 = &sdhc_1; 45 mmc1 = &sdhc_2; 46 serial0 = &uart5; 47 }; 48 49 wcd938x: audio-codec { 50 compatible = "qcom,wcd9380-codec"; 51 52 pinctrl-0 = <&wcd_default>; 53 pinctrl-names = "default"; 54 55 reset-gpios = <&tlmm 83 GPIO_ACTIVE_LOW>; 56 57 vdd-rxtx-supply = <&vreg_l18b_1p8>; 58 vdd-io-supply = <&vreg_l18b_1p8>; 59 vdd-buck-supply = <&vreg_l17b_1p8>; 60 vdd-mic-bias-supply = <&vreg_bob_3p296>; 61 62 qcom,micbias1-microvolt = <1800000>; 63 qcom,micbias2-microvolt = <1800000>; 64 qcom,micbias3-microvolt = <1800000>; 65 qcom,micbias4-microvolt = <1800000>; 66 qcom,mbhc-buttons-vthreshold-microvolt = <75000 150000 237000 500000 500000 500000 500000 500000>; 67 qcom,mbhc-headset-vthreshold-microvolt = <1700000>; 68 qcom,mbhc-headphone-vthreshold-microvolt = <50000>; 69 qcom,rx-device = <&wcd_rx>; 70 qcom,tx-device = <&wcd_tx>; 71 72 qcom,hphl-jack-type-normally-closed; 73 74 #sound-dai-cells = <1>; 75 }; 76 77 chosen { 78 stdout-path = "serial0:115200n8"; 79 }; 80 81 usb2_1_con: connector-0 { 82 compatible = "usb-a-connector"; 83 vbus-supply = <&vcc_5v_peri>; 84 85 port { 86 usb2_1_connector: endpoint { 87 remote-endpoint = <&usb_hub_2_1>; 88 }; 89 }; 90 }; 91 92 usb2_2_con: connector-1 { 93 compatible = "usb-a-connector"; 94 vbus-supply = <&vcc_5v_peri>; 95 96 port { 97 usb2_2_connector: endpoint { 98 remote-endpoint = <&usb_hub_2_2>; 99 }; 100 }; 101 }; 102 103 usb2_3_con: connector-2 { 104 compatible = "usb-a-connector"; 105 vbus-supply = <&vcc_5v_peri>; 106 107 port { 108 usb2_3_connector: endpoint { 109 remote-endpoint = <&usb_hub_2_3>; 110 }; 111 }; 112 }; 113 114 leds { 115 compatible = "gpio-leds"; 116 117 pinctrl-0 = <&user_led>; 118 pinctrl-names = "default"; 119 120 user-led { 121 color = <LED_COLOR_ID_BLUE>; 122 function = LED_FUNCTION_INDICATOR; 123 gpios = <&tlmm 42 GPIO_ACTIVE_HIGH>; 124 linux,default-trigger = "none"; 125 default-state = "off"; 126 panic-indicator; 127 }; 128 }; 129 130 reserved-memory { 131 xbl_mem: xbl@80700000 { 132 reg = <0x0 0x80700000 0x0 0x100000>; 133 no-map; 134 }; 135 136 cdsp_secure_heap_mem: cdsp-secure-heap@81800000 { 137 reg = <0x0 0x81800000 0x0 0x1e00000>; 138 no-map; 139 }; 140 141 camera_mem: camera@84300000 { 142 reg = <0x0 0x84300000 0x0 0x500000>; 143 no-map; 144 }; 145 146 adsp_mem: adsp@84800000 { 147 reg = <0x0 0x84800000 0x0 0x2800000>; 148 no-map; 149 }; 150 151 cdsp_mem: cdsp@87000000 { 152 reg = <0x0 0x87000000 0x0 0x1e00000>; 153 no-map; 154 }; 155 156 video_mem: video@88e00000 { 157 reg = <0x0 0x88e00000 0x0 0x700000>; 158 no-map; 159 }; 160 161 cvp_mem: cvp@89500000 { 162 reg = <0x0 0x89500000 0x0 0x500000>; 163 no-map; 164 }; 165 166 gpu_microcode_mem: gpu-microcode@89a00000 { 167 reg = <0x0 0x89a00000 0x0 0x2000>; 168 no-map; 169 }; 170 171 tz_stat_mem: tz-stat@c0000000 { 172 reg = <0x0 0xc0000000 0x0 0x100000>; 173 no-map; 174 }; 175 176 tags_mem: tags@c0100000 { 177 reg = <0x0 0xc0100000 0x0 0x1200000>; 178 no-map; 179 }; 180 181 qtee_mem: qtee@c1300000 { 182 reg = <0x0 0xc1300000 0x0 0x500000>; 183 no-map; 184 }; 185 186 trusted_apps_mem: trusted-apps@c1800000 { 187 reg = <0x0 0xc1800000 0x0 0x1c00000>; 188 no-map; 189 }; 190 191 debug_vm_mem: debug-vm@d0600000 { 192 reg = <0x0 0xd0600000 0x0 0x100000>; 193 no-map; 194 }; 195 }; 196 197 thermal-zones { 198 msm-skin-thermal { 199 polling-delay-passive = <0>; 200 thermal-sensors = <&pmk8350_adc_tm 2>; 201 }; 202 203 quiet-thermal { 204 polling-delay-passive = <0>; 205 thermal-sensors = <&pmk8350_adc_tm 1>; 206 }; 207 208 ufs-thermal { 209 polling-delay-passive = <0>; 210 thermal-sensors = <&pmk8350_adc_tm 3>; 211 }; 212 213 xo-thermal { 214 polling-delay-passive = <0>; 215 thermal-sensors = <&pmk8350_adc_tm 0>; 216 }; 217 }; 218 219 vcc_1v8: regulator-vcc-1v8 { 220 compatible = "regulator-fixed"; 221 regulator-name = "vcc_1v8"; 222 regulator-min-microvolt = <1800000>; 223 regulator-max-microvolt = <1800000>; 224 vin-supply = <&vcc_5v_peri>; 225 226 regulator-boot-on; 227 regulator-always-on; 228 }; 229 230 vcc_3v3: regulator-vcc-3v3 { 231 compatible = "regulator-fixed"; 232 regulator-name = "vcc_3v3"; 233 regulator-min-microvolt = <3300000>; 234 regulator-max-microvolt = <3300000>; 235 vin-supply = <&vcc_5v_peri>; 236 237 regulator-boot-on; 238 regulator-always-on; 239 }; 240 241 vcc_5v_peri: regulator-vcc-5v-peri { 242 compatible = "regulator-fixed"; 243 regulator-name = "vcc_5v_peri"; 244 regulator-min-microvolt = <5000000>; 245 regulator-max-microvolt = <5000000>; 246 vin-supply = <&vph_pwr>; 247 248 regulator-boot-on; 249 regulator-always-on; 250 }; 251 252 vph_pwr: regulator-vph-pwr { 253 compatible = "regulator-fixed"; 254 regulator-name = "vph_pwr"; 255 regulator-min-microvolt = <3700000>; 256 regulator-max-microvolt = <3700000>; 257 258 regulator-boot-on; 259 regulator-always-on; 260 }; 261}; 262 263&apps_rsc { 264 regulators-0 { 265 compatible = "qcom,pm7325-rpmh-regulators"; 266 qcom,pmic-id = "b"; 267 268 vdd-s1-supply = <&vph_pwr>; 269 vdd-s2-supply = <&vph_pwr>; 270 vdd-s3-supply = <&vph_pwr>; 271 vdd-s4-supply = <&vph_pwr>; 272 vdd-s5-supply = <&vph_pwr>; 273 vdd-s6-supply = <&vph_pwr>; 274 vdd-s7-supply = <&vph_pwr>; 275 vdd-s8-supply = <&vph_pwr>; 276 vdd-l1-l4-l12-l15-supply = <&vreg_s7b_0p536>; 277 vdd-l2-l7-supply = <&vreg_bob_3p296>; 278 vdd-l6-l9-l10-supply = <&vreg_s8b_1p2>; 279 vdd-l11-l17-l18-l19-supply = <&vreg_s1b_1p84>; 280 281 vreg_s1b_1p84: smps1 { 282 regulator-name = "vreg_s1b_1p84"; 283 regulator-min-microvolt = <1840000>; 284 regulator-max-microvolt = <2040000>; 285 }; 286 287 vreg_s7b_0p536: smps7 { 288 regulator-name = "vreg_s7b_0p536"; 289 regulator-min-microvolt = <536000>; 290 regulator-max-microvolt = <1120000>; 291 }; 292 293 vreg_s8b_1p2: smps8 { 294 regulator-name = "vreg_s8b_1p2"; 295 regulator-min-microvolt = <1200000>; 296 regulator-max-microvolt = <1496000>; 297 regulator-initial-mode = <RPMH_REGULATOR_MODE_RET>; 298 }; 299 300 vreg_l1b_0p912: ldo1 { 301 regulator-name = "vreg_l1b_0p912"; 302 regulator-min-microvolt = <832000>; 303 regulator-max-microvolt = <920000>; 304 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 305 regulator-allow-set-load; 306 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 307 RPMH_REGULATOR_MODE_HPM>; 308 }; 309 310 vreg_l2b_3p072: ldo2 { 311 regulator-name = "vreg_l2b_3p072"; 312 regulator-min-microvolt = <2704000>; 313 regulator-max-microvolt = <3544000>; 314 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 315 regulator-allow-set-load; 316 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 317 RPMH_REGULATOR_MODE_HPM>; 318 }; 319 320 vreg_l6b_1p2: ldo6 { 321 regulator-name = "vreg_l6b_1p2"; 322 regulator-min-microvolt = <1200000>; 323 regulator-max-microvolt = <1256000>; 324 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 325 regulator-allow-set-load; 326 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 327 RPMH_REGULATOR_MODE_HPM>; 328 }; 329 330 vreg_l7b_2p96: ldo7 { 331 regulator-name = "vreg_l7b_2p96"; 332 regulator-min-microvolt = <2960000>; 333 regulator-max-microvolt = <2960000>; 334 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 335 regulator-allow-set-load; 336 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 337 RPMH_REGULATOR_MODE_HPM>; 338 }; 339 340 vreg_l9b_1p2: ldo9 { 341 regulator-name = "vreg_l9b_1p2"; 342 regulator-min-microvolt = <1200000>; 343 regulator-max-microvolt = <1304000>; 344 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 345 regulator-allow-set-load; 346 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 347 RPMH_REGULATOR_MODE_HPM>; 348 }; 349 350 vreg_l17b_1p8: ldo17 { 351 regulator-name = "vreg_l17b_1p8"; 352 regulator-min-microvolt = <1800000>; 353 regulator-max-microvolt = <1896000>; 354 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 355 }; 356 357 vreg_l18b_1p8: ldo18 { 358 regulator-name = "vreg_l18b_1p8"; 359 regulator-min-microvolt = <1800000>; 360 regulator-max-microvolt = <2000000>; 361 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 362 regulator-always-on; 363 }; 364 365 vreg_l19b_1p8: ldo19 { 366 regulator-name = "vreg_l19b_1p8"; 367 regulator-min-microvolt = <1800000>; 368 regulator-max-microvolt = <2000000>; 369 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 370 regulator-allow-set-load; 371 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 372 RPMH_REGULATOR_MODE_HPM>; 373 }; 374 }; 375 376 regulators-1 { 377 compatible = "qcom,pm8350c-rpmh-regulators"; 378 qcom,pmic-id = "c"; 379 380 vdd-s1-supply = <&vph_pwr>; 381 vdd-s2-supply = <&vph_pwr>; 382 vdd-s3-supply = <&vph_pwr>; 383 vdd-s4-supply = <&vph_pwr>; 384 vdd-s5-supply = <&vph_pwr>; 385 vdd-s6-supply = <&vph_pwr>; 386 vdd-s7-supply = <&vph_pwr>; 387 vdd-s8-supply = <&vph_pwr>; 388 vdd-s9-supply = <&vph_pwr>; 389 vdd-s10-supply = <&vph_pwr>; 390 vdd-l1-l12-supply = <&vreg_s1b_1p84>; 391 vdd-l6-l9-l11-supply = <&vreg_bob_3p296>; 392 vdd-l10-supply = <&vreg_s7b_0p536>; 393 vdd-bob-supply = <&vph_pwr>; 394 395 vreg_l1c_1p8: ldo1 { 396 regulator-name = "vreg_l1c_1p8"; 397 regulator-min-microvolt = <1800000>; 398 regulator-max-microvolt = <1976000>; 399 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 400 regulator-allow-set-load; 401 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 402 RPMH_REGULATOR_MODE_HPM>; 403 }; 404 405 vreg_l6c_2p96: ldo6 { 406 regulator-name = "vreg_l6c_2p96"; 407 regulator-min-microvolt = <1650000>; 408 regulator-max-microvolt = <3544000>; 409 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 410 regulator-allow-set-load; 411 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 412 RPMH_REGULATOR_MODE_HPM>; 413 }; 414 415 vreg_l9c_2p96: ldo9 { 416 regulator-name = "vreg_l9c_2p96"; 417 regulator-min-microvolt = <2704000>; 418 regulator-max-microvolt = <3544000>; 419 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 420 regulator-allow-set-load; 421 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 422 RPMH_REGULATOR_MODE_HPM>; 423 }; 424 425 vreg_l10c_0p88: ldo10 { 426 regulator-name = "vreg_l10c_0p88"; 427 regulator-min-microvolt = <720000>; 428 regulator-max-microvolt = <1048000>; 429 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 430 regulator-allow-set-load; 431 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 432 RPMH_REGULATOR_MODE_HPM>; 433 }; 434 435 vreg_bob_3p296: bob { 436 regulator-name = "vreg_bob_3p296"; 437 regulator-min-microvolt = <3032000>; 438 regulator-max-microvolt = <3960000>; 439 }; 440 }; 441}; 442 443&gcc { 444 protected-clocks = <GCC_CFG_NOC_LPASS_CLK>, 445 <GCC_MSS_CFG_AHB_CLK>, 446 <GCC_MSS_GPLL0_MAIN_DIV_CLK_SRC>, 447 <GCC_MSS_OFFLINE_AXI_CLK>, 448 <GCC_MSS_Q6SS_BOOT_CLK_SRC>, 449 <GCC_MSS_Q6_MEMNOC_AXI_CLK>, 450 <GCC_MSS_SNOC_AXI_CLK>, 451 <GCC_SEC_CTRL_CLK_SRC>, 452 <GCC_WPSS_AHB_BDG_MST_CLK>, 453 <GCC_WPSS_AHB_CLK>, 454 <GCC_WPSS_RSCP_CLK>; 455}; 456 457&gpi_dma0 { 458 status = "okay"; 459}; 460 461&gpi_dma1 { 462 status = "okay"; 463}; 464 465&gpu { 466 status = "okay"; 467}; 468 469&gpu_zap_shader { 470 firmware-name = "qcom/qcs6490/a660_zap.mbn"; 471}; 472 473/* Pin 13, 15 in GPIO header */ 474&i2c0 { 475 qcom,enable-gsi-dma; 476 status = "okay"; 477}; 478 479/* Pin 27, 28 in GPIO header */ 480&i2c2 { 481 qcom,enable-gsi-dma; 482 status = "okay"; 483}; 484 485/* Pin 3, 5 in GPIO header */ 486&i2c6 { 487 qcom,enable-gsi-dma; 488 status = "okay"; 489}; 490 491&i2c10 { 492 qcom,enable-gsi-dma; 493 status = "okay"; 494 495 rtc: rtc@68 { 496 compatible = "st,m41t11"; 497 reg = <0x68>; 498 }; 499}; 500 501/* External touchscreen */ 502&i2c13 { 503 qcom,enable-gsi-dma; 504 status = "okay"; 505}; 506 507&lpass_audiocc { 508 compatible = "qcom,qcm6490-lpassaudiocc"; 509 /delete-property/ power-domains; 510}; 511 512&lpass_rx_macro { 513 status = "okay"; 514}; 515 516&lpass_tx_macro { 517 status = "okay"; 518}; 519 520&lpass_va_macro { 521 status = "okay"; 522}; 523 524&pcie0 { 525 perst-gpios = <&tlmm 87 GPIO_ACTIVE_LOW>; 526 wake-gpios = <&tlmm 89 GPIO_ACTIVE_HIGH>; 527 528 pinctrl-0 = <&pcie0_clkreq_n>, <&pcie0_reset_n>, <&pcie0_wake_n>; 529 pinctrl-names = "default"; 530 531 status = "okay"; 532}; 533 534&pcie0_phy { 535 vdda-phy-supply = <&vreg_l10c_0p88>; 536 vdda-pll-supply = <&vreg_l6b_1p2>; 537 538 status = "okay"; 539}; 540 541&pcie1 { 542 perst-gpios = <&tlmm 2 GPIO_ACTIVE_LOW>; 543 wake-gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>; 544 545 pinctrl-0 = <&pcie1_clkreq_n>, <&pcie1_reset_n>, <&pcie1_wake_n>; 546 pinctrl-names = "default"; 547 548 /* Support for QPS615 PCIe switch */ 549 iommu-map = <0x0 &apps_smmu 0x1c80 0x1>, 550 <0x100 &apps_smmu 0x1c81 0x1>, 551 <0x208 &apps_smmu 0x1c84 0x1>, 552 <0x210 &apps_smmu 0x1c85 0x1>, 553 <0x218 &apps_smmu 0x1c86 0x1>, 554 <0x300 &apps_smmu 0x1c87 0x1>, 555 <0x400 &apps_smmu 0x1c88 0x1>, 556 <0x500 &apps_smmu 0x1c89 0x1>, 557 <0x501 &apps_smmu 0x1c90 0x1>; 558 559 status = "okay"; 560}; 561 562&pcie1_phy { 563 vdda-phy-supply = <&vreg_l10c_0p88>; 564 vdda-pll-supply = <&vreg_l6b_1p2>; 565 566 status = "okay"; 567}; 568 569&pm7325_gpios { 570 pm7325_adc_default: adc-default-state { 571 pins = "gpio2"; 572 function = PMIC_GPIO_FUNC_NORMAL; 573 bias-high-impedance; 574 }; 575}; 576 577&pm7325_temp_alarm { 578 io-channels = <&pmk8350_vadc PM7325_ADC7_DIE_TEMP>; 579 io-channel-names = "thermal"; 580}; 581 582&pmk8350_adc_tm { 583 status = "okay"; 584 585 xo-therm@0 { 586 reg = <0>; 587 io-channels = <&pmk8350_vadc PMK8350_ADC7_AMUX_THM1_100K_PU>; 588 qcom,ratiometric; 589 qcom,hw-settle-time-us = <200>; 590 }; 591 592 quiet-therm@1 { 593 reg = <1>; 594 io-channels = <&pmk8350_vadc PM7325_ADC7_AMUX_THM1_100K_PU>; 595 qcom,ratiometric; 596 qcom,hw-settle-time-us = <200>; 597 }; 598 599 msm-skin-therm@2 { 600 reg = <2>; 601 io-channels = <&pmk8350_vadc PM7325_ADC7_AMUX_THM3_100K_PU>; 602 qcom,ratiometric; 603 qcom,hw-settle-time-us = <200>; 604 }; 605 606 ufs-therm@3 { 607 reg = <3>; 608 io-channels = <&pmk8350_vadc PM7325_ADC7_GPIO1_100K_PU>; 609 qcom,ratiometric; 610 qcom,hw-settle-time-us = <200>; 611 }; 612}; 613 614&pmk8350_vadc { 615 pinctrl-0 = <&pm7325_adc_default>; 616 pinctrl-names = "default"; 617 618 channel@3 { 619 reg = <PMK8350_ADC7_DIE_TEMP>; 620 label = "pmk7325_die_temp"; 621 qcom,pre-scaling = <1 1>; 622 }; 623 624 channel@44 { 625 reg = <PMK8350_ADC7_AMUX_THM1_100K_PU>; 626 label = "xo_therm"; 627 qcom,hw-settle-time = <200>; 628 qcom,pre-scaling = <1 1>; 629 qcom,ratiometric; 630 }; 631 632 channel@103 { 633 reg = <PM7325_ADC7_DIE_TEMP>; 634 label = "pm7325_die_temp"; 635 qcom,pre-scaling = <1 1>; 636 }; 637 638 channel@144 { 639 reg = <PM7325_ADC7_AMUX_THM1_100K_PU>; 640 qcom,ratiometric; 641 qcom,hw-settle-time = <200>; 642 qcom,pre-scaling = <1 1>; 643 label = "quiet_therm"; 644 }; 645 646 channel@146 { 647 reg = <PM7325_ADC7_AMUX_THM3_100K_PU>; 648 qcom,ratiometric; 649 qcom,hw-settle-time = <200>; 650 qcom,pre-scaling = <1 1>; 651 label = "msm_skin_therm"; 652 }; 653 654 channel@14a { 655 /* According to datasheet, 0x4a = AMUX1_GPIO = GPIO_02 */ 656 reg = <PM7325_ADC7_GPIO1_100K_PU>; 657 qcom,ratiometric; 658 qcom,hw-settle-time = <200>; 659 qcom,pre-scaling = <1 1>; 660 label = "ufs_therm"; 661 }; 662}; 663 664&pon_pwrkey { 665 status = "okay"; 666}; 667 668&qspi { 669 /* It's not possible to use QSPI with iommu */ 670 /* due to an error in qcom_smmu_write_s2cr */ 671 /delete-property/ iommus; 672 673 pinctrl-0 = <&qspi_clk>, <&qspi_cs0>, <&qspi_data0>, 674 <&qspi_data1>, <&qspi_data23>; 675 pinctrl-1 = <&qspi_sleep>; 676 pinctrl-names = "default", "sleep"; 677 678 status = "okay"; 679 680 spi_flash: flash@0 { 681 compatible = "winbond,w25q256", "jedec,spi-nor"; 682 reg = <0>; 683 684 spi-max-frequency = <104000000>; 685 spi-tx-bus-width = <4>; 686 spi-rx-bus-width = <4>; 687 }; 688}; 689 690&qupv3_id_0 { 691 firmware-name = "qcom/qcm6490/qupv3fw.elf"; 692 status = "okay"; 693}; 694 695&qupv3_id_1 { 696 firmware-name = "qcom/qcm6490/qupv3fw.elf"; 697 status = "okay"; 698}; 699 700&remoteproc_adsp { 701 firmware-name = "qcom/qcs6490/radxa/dragon-q6a/adsp.mbn"; 702 status = "okay"; 703}; 704 705&remoteproc_cdsp { 706 firmware-name = "qcom/qcs6490/cdsp.mbn"; 707 status = "okay"; 708}; 709 710&sdhc_1 { 711 non-removable; 712 no-sd; 713 no-sdio; 714 715 vmmc-supply = <&vreg_l7b_2p96>; 716 vqmmc-supply = <&vreg_l19b_1p8>; 717 718 status = "okay"; 719}; 720 721&sdhc_2 { 722 pinctrl-0 = <&sdc2_clk>, <&sdc2_cmd>, <&sdc2_data>, <&sd_cd>; 723 pinctrl-1 = <&sdc2_clk_sleep>, <&sdc2_cmd_sleep>, <&sdc2_data_sleep>, <&sd_cd>; 724 725 vmmc-supply = <&vreg_l9c_2p96>; 726 vqmmc-supply = <&vreg_l6c_2p96>; 727 728 cd-gpios = <&tlmm 91 GPIO_ACTIVE_LOW>; 729 status = "okay"; 730}; 731 732&sound { 733 compatible = "qcom,qcs6490-rb3gen2-sndcard"; 734 model = "QCS6490-Radxa-Dragon-Q6A"; 735 736 audio-routing = "IN1_HPHL", "HPHL_OUT", 737 "IN2_HPHR", "HPHR_OUT", 738 "AMIC2", "MIC BIAS2", 739 "TX SWR_ADC1", "ADC2_OUTPUT"; 740 741 wcd-playback-dai-link { 742 link-name = "WCD Playback"; 743 744 codec { 745 sound-dai = <&wcd938x 0>, <&swr0 0>, <&lpass_rx_macro 0>; 746 }; 747 748 cpu { 749 sound-dai = <&q6apmbedai RX_CODEC_DMA_RX_0>; 750 }; 751 752 platform { 753 sound-dai = <&q6apm>; 754 }; 755 }; 756 757 wcd-capture-dai-link { 758 link-name = "WCD Capture"; 759 760 codec { 761 sound-dai = <&wcd938x 1>, <&swr1 0>, <&lpass_tx_macro 0>; 762 }; 763 764 cpu { 765 sound-dai = <&q6apmbedai TX_CODEC_DMA_TX_3>; 766 }; 767 768 platform { 769 sound-dai = <&q6apm>; 770 }; 771 }; 772}; 773 774/* Pin 11, 29, 31, 32 in GPIO header */ 775&spi7 { 776 qcom,enable-gsi-dma; 777 status = "okay"; 778}; 779 780/* Pin 19, 21, 23, 24, 26 in GPIO header */ 781&spi12 { 782 qcom,enable-gsi-dma; 783 status = "okay"; 784}; 785 786/* Pin 22, 33, 36, 37 in GPIO header */ 787&spi14 { 788 qcom,enable-gsi-dma; 789 status = "okay"; 790}; 791 792&swr0 { 793 status = "okay"; 794 795 wcd_rx: codec@0,4 { 796 compatible = "sdw20217010d00"; 797 reg = <0 4>; 798 qcom,rx-port-mapping = <1 2 3 4 5>; 799 }; 800}; 801 802&swr1 { 803 status = "okay"; 804 805 wcd_tx: codec@0,3 { 806 compatible = "sdw20217010d00"; 807 reg = <0 3>; 808 qcom,tx-port-mapping = <1 1 2 3>; 809 }; 810}; 811 812&tlmm { 813 gpio-line-names = 814 /* GPIO_0 ~ GPIO_3 */ 815 "PIN_13", "PIN_15", "", "", 816 /* GPIO_4 ~ GPIO_7 */ 817 "", "", "", "", 818 /* GPIO_8 ~ GPIO_11 */ 819 "PIN_27", "PIN_28", "", "", 820 /* GPIO_12 ~ GPIO_15 */ 821 "", "", "", "", 822 /* GPIO_16 ~ GPIO_19 */ 823 "", "", "", "", 824 /* GPIO_20 ~ GPIO_23 */ 825 "", "", "PIN_8", "PIN_10", 826 /* GPIO_24 ~ GPIO_27 */ 827 "PIN_3", "PIN_5", "PIN_16", "PIN_27", 828 /* GPIO_28 ~ GPIO_31 */ 829 "PIN_31", "PIN_11", "PIN_32", "PIN_29", 830 /* GPIO_32 ~ GPIO_35 */ 831 "", "", "", "", 832 /* GPIO_36 ~ GPIO_39 */ 833 "", "", "", "", 834 /* GPIO_40 ~ GPIO_43 */ 835 "", "", "", "", 836 /* GPIO_44 ~ GPIO_47 */ 837 "", "", "", "", 838 /* GPIO_48 ~ GPIO_51 */ 839 "PIN_21", "PIN_19", "PIN_23", "PIN_24", 840 /* GPIO_52 ~ GPIO_55 */ 841 "", "", "", "PIN_26", 842 /* GPIO_56 ~ GPIO_59 */ 843 "PIN_33", "PIN_22", "PIN_37", "PIN_36", 844 /* GPIO_60 ~ GPIO_63 */ 845 "", "", "", "", 846 /* GPIO_64 ~ GPIO_67 */ 847 "", "", "", "", 848 /* GPIO_68 ~ GPIO_71 */ 849 "", "", "", "", 850 /* GPIO_72 ~ GPIO_75 */ 851 "", "", "", "", 852 /* GPIO_76 ~ GPIO_79 */ 853 "", "", "", "", 854 /* GPIO_80 ~ GPIO_83 */ 855 "", "", "", "", 856 /* GPIO_84 ~ GPIO_87 */ 857 "", "", "", "", 858 /* GPIO_88 ~ GPIO_91 */ 859 "", "", "", "", 860 /* GPIO_92 ~ GPIO_95 */ 861 "", "", "", "", 862 /* GPIO_96 ~ GPIO_99 */ 863 "PIN_7", "PIN_12", "PIN_38", "PIN_40", 864 /* GPIO_100 ~ GPIO_103 */ 865 "PIN_35", "", "", "", 866 /* GPIO_104 ~ GPIO_107 */ 867 "", "", "", "", 868 /* GPIO_108 ~ GPIO_111 */ 869 "", "", "", "", 870 /* GPIO_112 ~ GPIO_115 */ 871 "", "", "", "", 872 /* GPIO_116 ~ GPIO_119 */ 873 "", "", "", "", 874 /* GPIO_120 ~ GPIO_123 */ 875 "", "", "", "", 876 /* GPIO_124 ~ GPIO_127 */ 877 "", "", "", "", 878 /* GPIO_128 ~ GPIO_131 */ 879 "", "", "", "", 880 /* GPIO_132 ~ GPIO_135 */ 881 "", "", "", "", 882 /* GPIO_136 ~ GPIO_139 */ 883 "", "", "", "", 884 /* GPIO_140 ~ GPIO_143 */ 885 "", "", "", "", 886 /* GPIO_144 ~ GPIO_147 */ 887 "", "", "", "", 888 /* GPIO_148 ~ GPIO_151 */ 889 "", "", "", "", 890 /* GPIO_152 ~ GPIO_155 */ 891 "", "", "", "", 892 /* GPIO_156 ~ GPIO_159 */ 893 "", "", "", "", 894 /* GPIO_160 ~ GPIO_163 */ 895 "", "", "", "", 896 /* GPIO_164 ~ GPIO_167 */ 897 "", "", "", "", 898 /* GPIO_168 ~ GPIO_171 */ 899 "", "", "", "", 900 /* GPIO_172 ~ GPIO_174 */ 901 "", "", ""; 902 903 pcie0_reset_n: pcie0-reset-n-state { 904 pins = "gpio87"; 905 function = "gpio"; 906 drive-strength = <2>; 907 bias-disable; 908 }; 909 910 pcie0_wake_n: pcie0-wake-n-state { 911 pins = "gpio89"; 912 function = "gpio"; 913 drive-strength = <2>; 914 bias-pull-up; 915 }; 916 917 pcie1_reset_n: pcie1-reset-n-state { 918 pins = "gpio2"; 919 function = "gpio"; 920 drive-strength = <2>; 921 bias-disable; 922 }; 923 924 pcie1_wake_n: pcie1-wake-n-state { 925 pins = "gpio3"; 926 function = "gpio"; 927 drive-strength = <2>; 928 bias-pull-up; 929 }; 930 931 qspi_sleep: qspi-sleep-state { 932 pins = "gpio12", "gpio13", "gpio14", "gpio15", "gpio16", "gpio17"; 933 function = "gpio"; 934 output-disable; 935 }; 936 937 sd_cd: sd-cd-state { 938 pins = "gpio91"; 939 function = "gpio"; 940 bias-pull-up; 941 }; 942 943 user_led: user-led-state { 944 pins = "gpio42"; 945 function = "gpio"; 946 bias-pull-up; 947 }; 948 949 wcd_default: wcd-reset-n-active-state { 950 pins = "gpio83"; 951 function = "gpio"; 952 drive-strength = <16>; 953 bias-disable; 954 output-low; 955 }; 956}; 957 958&uart5 { 959 status = "okay"; 960}; 961 962&usb_2 { 963 dr_mode = "host"; 964 965 #address-cells = <1>; 966 #size-cells = <0>; 967 968 status = "okay"; 969 970 /* Onboard USB 2.0 hub */ 971 usb_hub_2_x: hub@1 { 972 compatible = "usb1a40,0101"; 973 reg = <1>; 974 vdd-supply = <&vcc_5v_peri>; 975 #address-cells = <1>; 976 #size-cells = <0>; 977 978 ports { 979 #address-cells = <1>; 980 #size-cells = <0>; 981 982 port@1 { 983 reg = <1>; 984 985 usb_hub_2_1: endpoint { 986 remote-endpoint = <&usb2_1_connector>; 987 }; 988 }; 989 990 port@2 { 991 reg = <2>; 992 993 usb_hub_2_2: endpoint { 994 remote-endpoint = <&usb2_2_connector>; 995 }; 996 }; 997 998 port@3 { 999 reg = <3>; 1000 1001 usb_hub_2_3: endpoint { 1002 remote-endpoint = <&usb2_3_connector>; 1003 }; 1004 }; 1005 }; 1006 1007 /* FCU760K Wi-Fi & Bluetooth module */ 1008 wifi@4 { 1009 compatible = "usba69c,8d80"; 1010 reg = <4>; 1011 }; 1012 }; 1013}; 1014 1015&usb_2_hsphy { 1016 vdda-pll-supply = <&vreg_l10c_0p88>; 1017 vdda33-supply = <&vreg_l2b_3p072>; 1018 vdda18-supply = <&vreg_l1c_1p8>; 1019 1020 status = "okay"; 1021}; 1022 1023&venus { 1024 status = "okay"; 1025}; 1026 1027/* PINCTRL - additions to nodes defined in sc7280.dtsi */ 1028&pcie0_clkreq_n { 1029 bias-pull-up; 1030 drive-strength = <2>; 1031}; 1032 1033&pcie1_clkreq_n { 1034 bias-pull-up; 1035 drive-strength = <2>; 1036}; 1037 1038&qspi_clk { 1039 bias-disable; 1040 drive-strength = <16>; 1041}; 1042 1043&qspi_cs0 { 1044 bias-disable; 1045 drive-strength = <8>; 1046}; 1047 1048&qspi_data0 { 1049 bias-disable; 1050 drive-strength = <8>; 1051}; 1052 1053&qspi_data1 { 1054 bias-disable; 1055 drive-strength = <8>; 1056}; 1057 1058&qspi_data23 { 1059 bias-disable; 1060 drive-strength = <8>; 1061}; 1062 1063&sdc1_clk { 1064 bias-disable; 1065 drive-strength = <16>; 1066}; 1067 1068&sdc1_cmd { 1069 bias-pull-up; 1070 drive-strength = <10>; 1071}; 1072 1073&sdc1_data { 1074 bias-pull-up; 1075 drive-strength = <10>; 1076}; 1077 1078&sdc1_rclk { 1079 bias-pull-down; 1080}; 1081 1082&sdc2_clk { 1083 bias-disable; 1084 drive-strength = <16>; 1085}; 1086 1087&sdc2_cmd { 1088 bias-pull-up; 1089 drive-strength = <10>; 1090}; 1091 1092&sdc2_data { 1093 bias-pull-up; 1094 drive-strength = <10>; 1095}; 1096