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/linux/drivers/clk/imx/
H A Dclk-imx31.c42 iim_gate, ata_gate, sdma_gate, cspi3_gate, rng_gate, uart1_gate, enumerator
85 clk[uart1_gate] = imx_clk_gate2("uart1_gate", "per", base + MXC_CCM_CGR0, 20); in _mx31_clocks_init()
H A Dclk-imx35.c77 /* 70 */ uart1_gate, uart2_gate, uart3_gate, usbotg_gate, wdog_gate, enumerator
206 clk[uart1_gate] = imx_clk_gate2("uart1_gate", "uart_div", base + MX35_CCM_CGR2, 16); in _mx35_clocks_init()
/linux/Documentation/devicetree/bindings/clock/
H A Dimx35-clock.yaml89 uart1_gate 70
H A Dimx31-clock.yaml49 uart1_gate 30
/linux/include/dt-bindings/clock/
H A Dnuvoton,ma35d1-clk.h148 #define UART1_GATE 133 macro
/linux/arch/arm64/boot/dts/nuvoton/
H A Dma35d1.dtsi259 clocks = <&clk UART1_GATE>;
/linux/drivers/clk/nuvoton/
H A Dclk-ma35d1.c787 hws[UART1_GATE] = ma35d1_clk_gate(dev, "uart1_gate", "uart1_div", in ma35d1_clocks_probe()