| /titanic_54/usr/src/uts/i86pc/os/ |
| H A D | timestamp.c | 187 if ((tsc = tsc_read()) >= tsc_last) { in tsc_gethrtime() 242 * don't migrate between the call to tsc_read() and in tsc_gethrtime_delta() 251 tsc = tsc_read() + tsc_sync_tick_delta[CPU->cpu_id]; in tsc_gethrtime_delta() 302 * migrated between the tsc_read() and adding the CPU's in dtrace_gethrtime() 307 tsc = tsc_read(); in dtrace_gethrtime() 351 * isn't migrated between the tsc_read() and adding in dtrace_gethrtime() 356 tsc = tsc_read(); in dtrace_gethrtime() 391 tsc = tsc_read() + tsc_last_jumped; in tsc_gethrtimeunscaled() 497 tsc->master_tsc = tsc_read(); in tsc_sync_master() 499 mtsc_after = tsc_read(); in tsc_sync_master() [all …]
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| H A D | mlsetup.c | 212 * Patch the tsc_read routine with appropriate set of instructions, in mlsetup() 217 * Note: tsc_read is not patched for intel processors whose family in mlsetup() 219 * instruction, unlikely). By default tsc_read will use cpuid for in mlsetup() 223 * Note: tsc_read is not patched for x86 processors which do in mlsetup() 224 * not support "mfence". By default tsc_read will use cpuid for in mlsetup()
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| H A D | ssp.c | 113 extern hrtime_t tsc_read(void); 114 #define SSP_GET_TICK tsc_read
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| H A D | intr.c | 532 hrtime_t now = tsc_read(); in hilevel_intr_prolog() 628 hrtime_t now = tsc_read(); in hilevel_intr_epilog() 708 hrtime_t now = tsc_read(); in intr_thread_prolog() 777 hrtime_t now = tsc_read(); in intr_thread_epilog() 923 time = tsc_read(); in intr_get_time() 991 now = tsc_read(); in dosoftint_prolog() 1055 hrtime_t now = tsc_read(); in dosoftint_epilog() 1229 interval = tsc_read() - start; in cpu_intr_swtch_enter() 1254 } while (atomic_cas_64(&t->t_intr_start, ts, tsc_read()) != ts); in cpu_intr_swtch_exit()
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| H A D | startup.c | 2869 * we can't poke the real hardware, so we use tsc_read() to in set_soft_hostid() 2871 * warning in tsc_read that says it can return zero, so we in set_soft_hostid() 2906 tsc = tsc_read(); in set_soft_hostid() 2907 if (tsc == 0) /* tsc_read can return zero sometimes */ in set_soft_hostid()
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| H A D | cpuid.c | 4607 (void) memcpy((void *)tsc_read, (void *)&_no_rdtsc_start, cnt); in patch_tsc_read() 4611 (void) memcpy((void *)tsc_read, in patch_tsc_read() 4616 (void) memcpy((void *)tsc_read, in patch_tsc_read() 4621 (void) memcpy((void *)tsc_read, (void *)&_tscp_start, cnt); in patch_tsc_read()
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| /titanic_54/usr/src/uts/intel/ia32/ml/ |
| H A D | swtch.s | 133 #define TSC_READ() \ macro 134 call tsc_read; \ 139 * structure. If an interrupt occurs between tsc_read() and its subsequent 149 TSC_READ(); \ 201 * structure. If an interrupt occurs between tsc_read() and its subsequent 214 call tsc_read; \
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| H A D | i86_subr.s | 795 tsc_read(void) 804 ENTRY_NP(tsc_read) 846 SET_SIZE(tsc_read) 850 ENTRY_NP(tsc_read) 884 SET_SIZE(tsc_read) 897 * correct tick value. The proper routine to use is tsc_read().
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| /titanic_54/usr/src/uts/i86pc/io/apix/ |
| H A D | apix_intr.c | 242 now = tsc_read(); in apix_do_softint_prolog() 307 hrtime_t now = tsc_read(); in apix_do_softint_epilog() 416 hrtime_t now = tsc_read(); in apix_hilevel_intr_prolog() 496 hrtime_t now = tsc_read(); in apix_hilevel_intr_epilog() 617 hrtime_t now = tsc_read(); in apix_intr_thread_prolog() 689 hrtime_t now = tsc_read(); in apix_intr_thread_epilog()
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| /titanic_54/usr/src/uts/i86pc/sys/ |
| H A D | tsc.h | 20 * flags to patch tsc_read routine.
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| H A D | clock.h | 65 extern hrtime_t tsc_read(void);
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| /titanic_54/usr/src/uts/common/sys/ |
| H A D | cpc_impl.h | 208 extern hrtime_t tsc_read(void); 209 #define KCPC_GET_TICK tsc_read
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| /titanic_54/usr/src/uts/i86xpv/ml/ |
| H A D | amd64.il | 82 * implementation of tsc_read.
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| H A D | ia32.il | 97 * implementation of tsc_read.
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| /titanic_54/usr/src/uts/intel/sys/ |
| H A D | mutex_impl.h | 111 #define MUTEX_GETTICK() tsc_read()
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| /titanic_54/usr/src/uts/i86xpv/os/ |
| H A D | xpv_timestamp.c | 88 #pragma weak tsc_read = dtrace_xpv_gethrtime macro
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| /titanic_54/usr/src/uts/i86pc/io/ |
| H A D | hpet_acpi.c | 133 extern hrtime_t tsc_read(void); in hpet_acpi_init() 251 hpet_info.tsc[0] = tsc_read(); in hpet_acpi_init() 254 hpet_info.tsc[1] = tsc_read(); in hpet_acpi_init() 257 hpet_info.tsc[2] = tsc_read(); in hpet_acpi_init()
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| /titanic_54/usr/src/uts/i86pc/vm/ |
| H A D | vm_dep.h | 50 #define GETTICK() tsc_read() 54 * correct tick value. The proper routine to use is tsc_read().
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| /titanic_54/usr/src/uts/i86pc/io/pcplusmp/ |
| H A D | apic_timer.c | 341 ticks = (uint64_t)tsc_read() + unscalehrtime(delta); in deadline_timer_reprogram()
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