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Searched +full:tegra264 +full:- +full:bpmp +full:- +full:shmem (Results 1 – 3 of 3) sorted by relevance

/linux/Documentation/devicetree/bindings/reserved-memory/
H A Dnvidia,tegra264-bpmp-shmem.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/reserved-memory/nvidia,tegra264-bpmp-shmem.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Tegra CPU-NS - BPMP IPC reserved memory
10 - Peter De Schrijver <pdeschrijver@nvidia.com>
13 Define a memory region used for communication between CPU-NS and BPMP.
15 has to be known to both CPU-NS and BPMP for correct IPC operation.
16 The memory region is defined using a child node under /reserved-memory.
17 The sub-node is named shmem@<address>.
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/linux/Documentation/devicetree/bindings/firmware/
H A Dnvidia,tegra186-bpmp.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/firmware/nvidia,tegra186-bpmp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra Boot and Power Management Processor (BPMP)
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
14 The BPMP is a specific processor in Tegra chip, which is designed for
17 defines the resources that would be used by the BPMP firmware driver,
19 CPU and BPMP.
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/linux/arch/arm64/boot/dts/nvidia/
H A Dtegra264.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 #include <dt-bindings/clock/nvidia,tegra264.h>
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/mailbox/tegra186-hsp.h>
6 #include <dt-bindings/memory/nvidia,tegra264.h>
7 #include <dt-bindings/power/nvidia,tegra264-bpmp.h>
8 #include <dt-bindings/reset/nvidia,tegra264.h>
11 compatible = "nvidia,tegra264";
12 interrupt-parent = <&gic>;
13 #address-cells = <2>;
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