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Searched +full:t8103 +full:- +full:pcie (Results 1 – 7 of 7) sorted by relevance

/linux/Documentation/devicetree/bindings/pci/
H A Dapple,pcie.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/apple,pcie.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Apple PCIe host controller
10 - Mark Kettenis <kettenis@openbsd.org>
13 The Apple PCIe host controller is a PCIe host controller with
16 The controller incorporates Synopsys DesigWare PCIe logic to
18 PCIe host bridges is absent.
26 the standard "reset-gpios" and "max-link-speed" properties appear on
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/linux/Documentation/devicetree/bindings/nvme/
H A Dapple,nvme-ans.yaml1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/nvme/apple,nvme-ans.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sven Peter <sven@svenpeter.dev>
15 - enum:
16 - apple,t8103-nvme-ans2
17 - apple,t8112-nvme-ans2
18 - apple,t6000-nvme-ans2
19 - const: apple,nvme-ans2
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/linux/arch/arm64/boot/dts/apple/
H A Dt8103.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
3 * Apple T8103 "M1" SoC
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interrupt-controller/apple-aic.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/pinctrl/apple.h>
14 #include <dt-bindings/spmi/spmi.h>
17 compatible = "apple,t8103", "apple,arm-platform";
19 #address-cells = <2>;
20 #size-cells = <2>;
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H A Dt8112.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interrupt-controller/apple-aic.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/pinctrl/apple.h>
14 #include <dt-bindings/spmi/spmi.h>
17 compatible = "apple,t8112", "apple,arm-platform";
19 #address-cells = <2>;
20 #size-cells = <2>;
27 #address-cells = <2>;
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/linux/Documentation/devicetree/bindings/nvmem/
H A Dapple,efuses.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Apple SoC eFuse-based NVMEM
10 Apple SoCs such as the M1 contain factory-programmed eFuses used to e.g. store
11 calibration data for the PCIe and the Type-C PHY or unique chip identifiers
15 - Sven Peter <sven@svenpeter.dev>
18 - $ref: nvmem.yaml#
19 - $ref: nvmem-deprecated-cells.yaml#
24 - enum:
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/linux/drivers/pci/controller/
H A Dpcie-apple.c1 // SPDX-License-Identifier: GPL-2.0
3 * PCIe host bridge driver for Apple system-on-chips.
6 * the driver mostly deals MSI mapping and handling of per-port
26 #include <linux/irqchip/irq-msi-lib.h>
32 #include <linux/pci-ecam.h>
34 #include "pci-host-common.h"
36 /* T8103 (original M1) and related SoCs */
130 /* T602x (M2-pro and co) */
198 struct apple_pcie *pcie; member
224 msg->address_hi = upper_32_bits(DOORBELL_ADDR); in apple_msi_compose_msg()
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/linux/drivers/iommu/
H A Dapple-dart.c1 // SPDX-License-Identifier: GPL-2.0-only
7 * Based on arm/arm-smmu/arm-ssmu.c and arm/arm-smmu-v3/arm-smmu-v3.c
10 * and on exynos-iommu.c
18 #include <linux/dma-mapping.h>
21 #include <linux/io-pgtable.h>
35 #include "dma-iommu.h"
145 #define DART_TCR(dart, sid) ((dart)->hw->tcr + ((sid) << 2))
147 #define DART_TTBR(dart, sid, idx) ((dart)->hw->ttbr + \
148 (((dart)->hw->ttbr_count * (sid)) << 2) + \
192 * @hw: SoC-specific hardware data
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