Searched full:synchronised (Results 1 – 25 of 36) sorted by relevance
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| /linux/arch/openrisc/kernel/ |
| H A D | sync-timer.c | 6 * All CPUs will have their count registers synchronised to the CPU0 next time
42 * then the last pass is more or less synchronised and in synchronise_count_master()
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| /linux/drivers/gpu/drm/i915/ |
| H A D | i915_syncmap.c | 143 * If we have already synchronised this @root timeline with another (@id) then
148 * Returns true if the two timelines are already synchronised wrt to @seqno,
339 * @id: the context id (other timeline) we have synchronised to
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| /linux/Documentation/arch/arm/samsung/ |
| H A D | gpio.rst | 19 GPIO numbering is synchronised between the Samsung and gpiolib system.
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| /linux/arch/arm/mach-omap2/ |
| H A D | omap4-common.c | 71 * accesses) are properly synchronised with writes to DMA coherent memory
78 * Note: the SRAM path is not synchronised via mb() and wmb().
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| /linux/Documentation/devicetree/bindings/pwm/ |
| H A D | microchip,corepwm.yaml | 47 synchronised mode for all channels it has been synthesised for.
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| /linux/rust/kernel/ |
| H A D | pid_namespace.rs | 64 // we're either accessing properties that don't change or that are properly synchronised by C code.
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| H A D | opp.rs | 616 /// we're either accessing properties that don't change or that are properly synchronised by C code.
1040 /// either accessing properties that don't change or that are properly synchronised by C code.
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| H A D | task.rs | 106 // synchronised by C code (e.g., `signal_pending`).
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| /linux/include/linux/ |
| H A D | dm-dirty-log.h | 98 * tells you if an area is synchronised, the other
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| /linux/drivers/mailbox/ |
| H A D | platform_mhu.c | 5 * Synchronised with arm_mhu.c from :
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| /linux/Documentation/userspace-api/media/v4l/ |
| H A D | metafmt-d4xx.rst | 133 - Byte 0: bit 0: depth and RGB are synchronised, bit 1: external trigger
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| /linux/include/uapi/linux/ |
| H A D | stat.h | 83 * - the datum will be synchronised to the server if AT_STATX_FORCE_SYNC is
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| /linux/tools/include/uapi/linux/ |
| H A D | stat.h | 83 * - the datum will be synchronised to the server if AT_STATX_FORCE_SYNC is
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| /linux/tools/perf/trace/beauty/include/uapi/linux/ |
| H A D | stat.h | 83 * - the datum will be synchronised to the server if AT_STATX_FORCE_SYNC is
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| /linux/drivers/mfd/ |
| H A D | ucb1x00-core.c | 231 * synchronised ADC conversions (via the ADCSYNC pin) must wait
237 * If called for a synchronised ADC conversion, it may sleep
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| /linux/arch/sh/mm/ |
| H A D | fault.c | 156 * The page tables are fully synchronised so there must in vmalloc_sync_one()
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| /linux/sound/soc/ |
| H A D | soc-jack.c | 28 * synchronised.
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| /linux/arch/powerpc/platforms/powernv/ |
| H A D | subcore.c | 109 * subcores have separate timebases SPRs but these are pre-synchronised by
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| /linux/drivers/iio/adc/ |
| H A D | nau7802.c | 160 * Conversions are synchronised on the rising edge of NAU7802_PUCTRL_CS_BIT
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| /linux/arch/arm/include/asm/ |
| H A D | cacheflush.h | 265 * Harvard caches are synchronised for the user space address range.
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| /linux/arch/mips/kernel/ |
| H A D | smp.c | 393 /* The CPU is running and counters synchronised, now mark it online */ in start_secondary()
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| /linux/drivers/dma/ti/ |
| H A D | omap-dma.c | 1446 * A source-synchronised channel is one where the fetching of data is in omap_dma_pause()
1448 * transfer. So, a destination-synchronised channel (which would be a in omap_dma_pause()
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| /linux/drivers/irqchip/ |
| H A D | irq-gic-v5.c | 83 * effects are synchronised. in gicv5_ppi_priority_init()
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| /linux/drivers/net/ethernet/sfc/siena/ |
| H A D | siena.c | 726 /* If it failed, attempt to get into a synchronised in siena_init_wol()
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| /linux/drivers/rtc/ |
| H A D | rtc-stm32.c | 447 * synchronised, it takes around 2 rtc_ck clock cycles in stm32_rtc_wait_sync()
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