| /linux/drivers/gpu/drm/radeon/ |
| H A D | si_dma.c | 32 * si_dma_is_lockup - Check if the DMA engine is locked up
43 u32 mask; in si_dma_is_lockup() local
45 if (ring->idx == R600_RING_TYPE_DMA_INDEX) in si_dma_is_lockup()
46 mask = RADEON_RESET_DMA; in si_dma_is_lockup()
48 mask = RADEON_RESET_DMA1; in si_dma_is_lockup()
50 if (!(reset_mask & mask)) { in si_dma_is_lockup()
58 * si_dma_vm_copy_pages - update PTEs by copying them from the GART
64 * @count: number of page entries to update
66 * Update PTEs by copying them from the GART using the DMA (SI).
78 ib->ptr[ib->length_dw++] = DMA_PACKET(DMA_PACKET_COPY, in si_dma_vm_copy_pages()
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| H A D | cik_sdma.c | 38 * sDMA - System DMA
55 * cik_sdma_get_rptr - get the current read pointer
67 if (rdev->wb.enabled) { in cik_sdma_get_rptr()
68 rptr = rdev->wb.wb[ring->rptr_offs/4]; in cik_sdma_get_rptr()
70 if (ring->idx == R600_RING_TYPE_DMA_INDEX) in cik_sdma_get_rptr()
82 * cik_sdma_get_wptr - get the current write pointer
94 if (ring->idx == R600_RING_TYPE_DMA_INDEX) in cik_sdma_get_wptr()
103 * cik_sdma_set_wptr - commit the write pointer
115 if (ring->idx == R600_RING_TYPE_DMA_INDEX) in cik_sdma_set_wptr()
120 WREG32(reg, (ring->wptr << 2) & 0x3fffc); in cik_sdma_set_wptr()
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| H A D | radeon_vm.c | 54 * radeon_vm_num_pdes - return the number of page directory entries
62 return rdev->vm_manager.max_pfn >> radeon_vm_block_size; in radeon_vm_num_pdes()
66 * radeon_vm_directory_size - returns the size of the page directory in bytes
78 * radeon_vm_manager_init - init the vm manager
89 if (!rdev->vm_manager.enabled) { in radeon_vm_manager_init()
94 rdev->vm_manager.enabled = true; in radeon_vm_manager_init()
100 * radeon_vm_manager_fini - tear down the vm manager
110 if (!rdev->vm_manager.enabled) in radeon_vm_manager_fini()
114 radeon_fence_unref(&rdev->vm_manager.active[i]); in radeon_vm_manager_fini()
116 rdev->vm_manager.enabled = false; in radeon_vm_manager_fini()
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| /linux/Documentation/devicetree/bindings/pwm/ |
| H A D | microchip,corepwm.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Conor Dooley <conor.dooley@microchip.com>
16 https://www.microsemi.com/existing-parts/parts/152118
19 - $ref: pwm.yaml#
24 - const: microchip,corepwm-rtl-v4
32 "#pwm-cells":
37 microchip,sync-update-mask:
48 Each bit of "microchip,sync-update-mask" corresponds to a PWM channel & represents
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| /linux/include/sound/ |
| H A D | hda_regmap.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
3 * HD-audio regmap helpers
26 unsigned int mask, unsigned int val);
28 unsigned int mask, unsigned int val);
32 * snd_hdac_regmap_encode_verb - encode the verb to a pseudo register
42 * snd_hdac_regmap_encode_amp - encode the AMP verb to a pseudo register
57 * snd_hdac_regmap_encode_amp_stereo - encode a pseudo register for stereo AMPs
71 * snd_hdac_regmap_write - Write a verb with caching
88 * snd_hda_regmap_update - Update a verb value with caching
90 * @verb: verb to update
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| /linux/tools/testing/selftests/net/bench/page_pool/ |
| H A D | time_bench.c | 1 // SPDX-License-Identifier: GPL-2.0-only
24 /** TSC (Time-Stamp Counter) based **
29 /** Wall-clock based **
49 * From Table 19-1. Architectural Performance Events
120 uint32_t invoked_cnt = 0; /* 32-bit due to div_u64_rem() */ in time_bench_calc_stats()
122 if (rec->flags & TIME_BENCH_LOOP) { in time_bench_calc_stats()
123 if (rec->invoked_cnt < 1000) { in time_bench_calc_stats()
125 rec->invoked_cnt); in time_bench_calc_stats()
128 if (rec->invoked_cnt > ((1ULL << 32) - 1)) { in time_bench_calc_stats()
131 rec->invoked_cnt); in time_bench_calc_stats()
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| /linux/drivers/net/ethernet/intel/fm10k/ |
| H A D | fm10k_netdev.c | 1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2013 - 2019 Intel Corporation. */
10 * fm10k_setup_tx_resources - allocate Tx resources (Descriptors)
17 struct device *dev = tx_ring->dev; in fm10k_setup_tx_resources()
20 size = sizeof(struct fm10k_tx_buffer) * tx_ring->count; in fm10k_setup_tx_resources()
22 tx_ring->tx_buffer = vzalloc(size); in fm10k_setup_tx_resources()
23 if (!tx_ring->tx_buffer) in fm10k_setup_tx_resources()
26 u64_stats_init(&tx_ring->syncp); in fm10k_setup_tx_resources()
29 tx_ring->size = tx_ring->count * sizeof(struct fm10k_tx_desc); in fm10k_setup_tx_resources()
30 tx_ring->size = ALIGN(tx_ring->size, 4096); in fm10k_setup_tx_resources()
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| /linux/sound/soc/ |
| H A D | soc-jack.c | 1 // SPDX-License-Identifier: GPL-2.0+
3 // soc-jack.c -- ALSA SoC jack handling
20 * snd_soc_jack_report - Report the current status for a jack
24 * @mask: a bitmask of enum snd_jack_type values that being reported.
33 void snd_soc_jack_report(struct snd_soc_jack *jack, int status, int mask) in snd_soc_jack_report() argument
37 unsigned int sync = 0; in snd_soc_jack_report() local
39 if (!jack || !jack->jack) in snd_soc_jack_report()
41 trace_snd_soc_jack_report(jack, mask, status); in snd_soc_jack_report()
43 dapm = &jack->card->dapm; in snd_soc_jack_report()
45 mutex_lock(&jack->mutex); in snd_soc_jack_report()
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| /linux/sound/hda/core/ |
| H A D | regmap.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Regmap support for HD-audio verbs
9 * - Provided for not all verbs but only subset standard non-volatile verbs.
10 * - For reading, only AC_VERB_GET_* variants can be used.
11 * - For writing, mapped to the *corresponding* AC_VERB_SET_* variants,
45 return !codec->cache_coe in hda_volatile_reg()
512 reg_raw_update(struct hdac_device * codec,unsigned int reg,unsigned int mask,unsigned int val) reg_raw_update() argument
550 snd_hdac_regmap_update_raw(struct hdac_device * codec,unsigned int reg,unsigned int mask,unsigned int val) snd_hdac_regmap_update_raw() argument
557 reg_raw_update_once(struct hdac_device * codec,unsigned int reg,unsigned int mask,unsigned int val) reg_raw_update_once() argument
584 snd_hdac_regmap_update_raw_once(struct hdac_device * codec,unsigned int reg,unsigned int mask,unsigned int val) snd_hdac_regmap_update_raw_once() argument
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| /linux/sound/soc/stm/ |
| H A D | stm32_sai_sub.c | 1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2016, STMicroelectronics - All Rights Reserved
10 #include <linux/clk-provider.h>
41 #define STM_SAI_IS_PLAYBACK(ip) ((ip)->dir == SNDRV_PCM_STREAM_PLAYBACK)
42 #define STM_SAI_IS_CAPTURE(ip) ((ip)->dir == SNDRV_PCM_STREAM_CAPTURE)
47 #define STM_SAI_IS_SUB_A(x) ((x)->id == STM_SAI_A_ID)
53 #define STM_SAI_PROTOCOL_IS_SPDIF(ip) ((ip)->spdi
123 int sync; global() member
196 stm32_sai_sub_reg_up(struct stm32_sai_sub_data * sai,unsigned int reg,unsigned int mask,unsigned int val) stm32_sai_sub_reg_up() argument
213 stm32_sai_sub_reg_wr(struct stm32_sai_sub_data * sai,unsigned int reg,unsigned int mask,unsigned int val) stm32_sai_sub_reg_wr() argument
347 int ret, cr1, mask; stm32_sai_set_clk_div() local
1393 unsigned int mask; stm32_sai_pcm_process_spdif() local
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| /linux/sound/pci/pcxhr/ |
| H A D | pcxhr_mixer.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
25 #define PCXHR_LINE_CAPTURE_LEVEL_MIN 0 /* -112.0 dB */
27 #define PCXHR_LINE_CAPTURE_ZERO_LEVEL 224 /* 0.0 dB ( 0 dBu -> 0 dBFS ) */
29 #define PCXHR_LINE_PLAYBACK_LEVEL_MIN 0 /* -104.0 dB */
31 #define PCXHR_LINE_PLAYBACK_ZERO_LEVEL 104 /* 0.0 dB ( 0 dBFS -> 0 dBu ) */
33 static const DECLARE_TLV_DB_SCALE(db_scale_analog_capture, -1120
574 unsigned int mask, reg; pcxhr_set_audio_source() local
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| /linux/arch/arm64/include/asm/vdso/ |
| H A D | vsyscall.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
13 * Update the vDSO data page to keep in sync with kernel timekeeping.
18 vc->mask = VDSO_PRECISION_MASK; in __arch_update_vdso_clock()
22 /* The asm-generic header needs to be included after the definitions above */
23 #include <asm-generic/vdso/vsyscall.h>
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| /linux/include/linux/ |
| H A D | ptp_classify.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
27 #define PTP_CLASS_PMASK 0x70 /* mask for the packet type field */
57 #define IPV4_HLEN(data) (((struct iphdr *)(data + OFF_IHL))->ihl << 2)
85 * ptp_classify_raw - classify a PTP packet
97 * ptp_parse_header - Get pointer to the PTP v2 header
112 * ptp_get_msgtype - Extract ptp message type from given header
128 msgtype = hdr->control; in ptp_get_msgtype()
130 msgtype = hdr->tsmt & 0x0f; in ptp_get_msgtype()
137 * ptp_check_diff8 - Computes new checksum (when altering a 64-bit field)
155 * ptp_header_update_correction - Update PTP header's correction field
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| /linux/drivers/gpio/ |
| H A D | gpio-crystalcove.c | 1 // SPDX-License-Identifier: GPL-2.0
66 * struct crystalcove_gpio - Crystal Cove GPIO controller
67 * @buslock: for bus lock/sync and unlock.
70 * @update: pending IRQ setting update, to be written to the chip upon unlock.
72 * @set_irq_mask: true if the IRQ mask needs to be set, false to clear.
78 int update; member
96 return -ENOTSUPP; in to_reg()
118 int mask = BIT(gpio % 8); in crystalcove_update_irq_mask() local
120 if (cg->set_irq_mask) in crystalcove_update_irq_mask()
121 regmap_update_bits(cg->regmap, mirqs0, mask, mask); in crystalcove_update_irq_mask()
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| H A D | gpio-wcove.c | 1 // SPDX-License-Identifier: GPL-2.0
5 * This driver is written based on gpio-crystalcove.c
22 * Bank 0: Pin 0 - 6
23 * Bank 1: Pin 7 - 10
24 * Bank 2: Pin 11 - 12
32 /* GPIO output control registers (one per pin): 0x4e44 - 0x4e50 */
34 /* GPIO input control registers (one per pin): 0x4e51 - 0x4e5d */
39 * Group 0: Bank 0 pins (Pin 0 - 6)
40 * Group 1: Bank 1 and Bank 2 pins (Pin 7 - 12)
41 * Each group has two registers (one bit per pin): status and mask.
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| /linux/include/linux/firmware/intel/ |
| H A D | stratix10-smc.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (C) 2017-2018, Intel Corporation
9 #include <linux/arm-smccc.h>
19 * An ARM SMC instruction takes a function identifier and up to 6 64-bit
20 * register values as arguments, and can return up to 4 64-bit register
31 * STD call starts a operation which can be preempted by a non-secure
69 * There is error during the process of remote status update request.
81 * Sync call used by service driver at EL1 to request the FPGA in EL3 to
88 * a2-7: not used.
92 * a1-3: not used.
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| /linux/include/uapi/linux/ |
| H A D | ip_vs.h | 1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
23 #define IP_VS_SVC_F_ONEPACKET 0x0004 /* one-packet scheduling */
38 * IPVS sync daemon states
82 #define IP_VS_CONN_F_FWD_MASK 0x0007 /* mask for the fwd methods */
88 #define IP_VS_CONN_F_SYNC 0x0020 /* entry created by sync */
94 #define IP_VS_CONN_F_SEQ_MASK 0x0600 /* in/out sequence mask */
108 /* Bits allowed to update in backup server */
281 /* sync daemon state (master/backup) */
304 __u32 mask; member
321 IPVS_CMD_NEW_DAEMON, /* start sync daemon */
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| /linux/drivers/gpu/drm/imagination/ |
| H A D | pvr_rogue_fwif_shared.h | 1 /* SPDX-License-Identifier: GPL-2.0-only OR MIT */
19 * The number is based on having 32 sync prims (as originally), plus 32 sync
21 * Once the use of sync prims is no longer supported, we will retain
22 * the same total (64) as the number of sync checkpoints which may be
69 * Used to share frame numbers across UM-KM-FW,
85 * single-BVNC). Kernel is implemented in a multi-BVNC manner, so it can't use geometry|fragment
86 * CMD type definitions directly. Therefore we have a SHARED block that is shared between UM-KM-FW
95 * selection and for storing out HW-context, when TA is switched out for
107 * into the CCCB as well as the wrapping mask to aid wrap around. A given
111 * [..........|-1----------|=2===|=3===|=4===|~5~~~~|~6~~~~|~7~~~~|..........]
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| /linux/arch/arm/mach-omap2/ |
| H A D | sram242x.S | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * linux/arch/arm/mach-omap2/sram242x.S
9 * Richard Woodruff <r-woodruff2@ti.com>
31 stmfd sp!, {r0 - r12, lr} @ save registers on stack
39 str r3, [r2] @ go to L1-freq operation
50 mvn r9, #0x4 @ mask to get clear bit2
62 mov r9, #0x0 @ shift back to L0-voltage
67 str r3, [r2] @ go to L0-freq operation
82 ldmfd sp!, {r0 - r12, pc} @ restore regs and return
94 * wait for it to finish, use 32k sync counter, 1tick=31uS.
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| H A D | sram243x.S | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * linux/arch/arm/mach-omap2/sram243x.S
9 * Richard Woodruff <r-woodruff2@ti.com>
31 stmfd sp!, {r0 - r12, lr} @ save registers on stack
39 str r3, [r2] @ go to L1-freq operation
50 mvn r9, #0x4 @ mask to get clear bit2
62 mov r9, #0x0 @ shift back to L0-voltage
67 str r3, [r2] @ go to L0-freq operation
82 ldmfd sp!, {r0 - r12, pc} @ restore regs and return
94 * wait for it to finish, use 32k sync counter, 1tick=31uS.
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| /linux/arch/powerpc/platforms/powernv/ |
| H A D | subcore.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
32 * A core can be in one of three states, unsplit, 2-way split, and 4-way split.
37 * ------------|------------------
39 * 2-way split | 2
40 * 4-way split | 4
46 * ----------------------------
48 * ----------------------------
50 * ----------------------------
52 * 2-way split:
53 * -------------------------------------
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| /linux/drivers/net/ethernet/intel/igc/ |
| H A D | igc_defines.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
90 /* Loop limit on how long we wait for auto-negotiation to complete */
172 /* 1000BASE-T Control Register */
176 /* 1000BASE-T Status Register */
195 #define IGC_EECD_FLUPD_I225 0x00800000 /* Update FLASH */
196 #define IGC_EECD_FLUDONE_I225 0x04000000 /* Update FLASH done*/
225 #define IGC_STATUS_FUNC_MASK 0x0000000C /* PCI Function Mask */
239 /* 1Gbps and 2.5Gbps half duplex is not supported, nor spec-compliant. */
263 #define IGC_ICR_TS BIT(19) /* Time Sync Interrupt */
278 /* Interrupt Mask Set */
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| /linux/fs/ |
| H A D | select.c | 1 // SPDX-License-Identifier: GPL-2.0
14 * Changed sys_poll()/do_poll() to use PAGE_SIZE chunk-based allocation
58 if (tv->tv_sec < 0) in __estimate_accuracy()
64 if (tv->tv_sec > MAX_SLACK / (NSEC_PER_SEC/divfactor)) in __estimate_accuracy()
67 slack = tv->tv_nsec / divfactor; in __estimate_accuracy()
68 slack += tv->tv_sec * (NSEC_PER_SEC/divfactor); in __estimate_accuracy()
80 u64 slack = current->timer_slack_ns; in select_estimate_accuracy()
102 ((unsigned long)((table)->entry+1) > PAGE_SIZE + (unsigned long)(table))
107 * follow, but it should be free of race-conditions, and it's practical. If you
112 * work. poll_wait() is an inline-function defined in <linux/poll.h>,
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| /linux/include/uapi/linux/raid/ |
| H A D | md_p.h | 1 /* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
4 Copyright (C) 1996-98 Ingo Molnar, Gadi Oxman
29 * 0 - 31 Constant generic RAID device information.
30 * 32 - 63 Generic state information.
31 * 64 - 127 Personality specific information.
32 * 128 - 511 12 32-words descriptors of the disks in the raid set.
33 * 512 - 911 Reserved.
34 * 912 - 1023 Disk specific descriptor.
40 * y = (x & ~(MD_RESERVED_BYTES - 1)) - MD_RESERVED_BYTES
47 #define MD_NEW_SIZE_SECTORS(x) ((x & ~(MD_RESERVED_SECTORS - 1)) - MD_RESERVED_SECTORS)
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| /linux/arch/riscv/kvm/ |
| H A D | vcpu.c | 1 // SPDX-License-Identifier: GPL-2.0
57 struct kvm_vcpu_csr *csr = &vcpu->arch.guest_csr; in kvm_riscv_vcpu_context_reset()
58 struct kvm_cpu_context *cntx = &vcpu->arch.guest_context; in kvm_riscv_vcpu_context_reset()
59 void *vector_datap = cntx->vector.datap; in kvm_riscv_vcpu_context_reset()
63 memset(&vcpu->arch.smstateen_csr, 0, sizeof(vcpu->arch.smstateen_csr)); in kvm_riscv_vcpu_context_reset()
66 cntx->vector.datap = vector_datap; in kvm_riscv_vcpu_context_reset()
72 cntx->sstatus = SR_SPP | SR_SPIE; in kvm_riscv_vcpu_context_reset()
74 cntx->hstatus |= HSTATUS_VTW; in kvm_riscv_vcpu_context_reset()
75 cntx->hstatus |= HSTATUS_SPVP; in kvm_riscv_vcpu_context_reset()
76 cntx->hstatus |= HSTATUS_SPV; in kvm_riscv_vcpu_context_reset()
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