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Searched full:sw_reset (Results 1 – 14 of 14) sorted by relevance

/titanic_50/usr/src/uts/common/io/dmfe/
H A Ddmfe.h181 #define SW_RESET 0x00000001 macro
H A Ddmfe_main.c382 dmfe_chip_put32(dmfep, BUS_MODE_REG, SW_RESET); in dmfe_stop_chip()
/titanic_50/usr/src/uts/intel/io/dnet/
H A Ddnet.h135 #define SW_RESET 0x01UL macro
H A Ddnet.c474 ddi_put32(io_handle, REG32(io_reg, BUS_MODE_REG), SW_RESET); in dnet_hack()
867 REG32(dnetp->io_reg, BUS_MODE_REG), SW_RESET); in dnet_quiesce()
889 REG32(dnetp->io_reg, BUS_MODE_REG), SW_RESET); in dnet_reset_board()
/titanic_50/usr/src/uts/common/io/xge/hal/include/
H A Dxgehal-regs.h63 u64 sw_reset; member
75 /* The SW_RESET register must read this value after a successful reset. */
/titanic_50/usr/src/uts/common/io/xge/hal/xgehal/
H A Dxgehal-device.c2841 XGE_HAL_SW_RESET_XGXS, &bar0->sw_reset); in __hal_device_hw_initialize()
2844 /* Clear the XGXS_RESET field of the SW_RESET register in order to in __hal_device_hw_initialize()
2847 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, 0, &bar0->sw_reset); in __hal_device_hw_initialize()
2849 &bar0->sw_reset); in __hal_device_hw_initialize()
3048 (u32)(XGE_HAL_SW_RESET_ALL>>32), (char *)&bar0->sw_reset); in __hal_device_reset()
3059 &bar0->sw_reset); in __hal_device_reset()
3100 &bar0->sw_reset); in __hal_device_reset()
3137 &bar0->sw_reset); in __hal_device_reset()
/titanic_50/usr/src/uts/common/io/ib/adapters/hermon/
H A Dhermon.c1652 * here (HCR and sw_reset) are detailed in the PRM, the others are in hermon_hw_init()
1661 /* Software Reset register (sw_reset) and semaphore */ in hermon_hw_init()
1662 state->hs_cmd_regs.sw_reset = (uint32_t *) in hermon_hw_init()
3882 ddi_put32(cmdhdl, state->hs_cmd_regs.sw_reset, HERMON_SW_RESET_START); in hermon_sw_reset()
4942 ddi_put32(cmdhdl, state->hs_cmd_regs.sw_reset, HERMON_SW_RESET_START); in hermon_quiesce()
H A Dhermon_fm.c592 state->hs_cmd_regs.sw_reset = (uint32_t *) in hermon_fm_ereport_init()
/titanic_50/usr/src/uts/common/sys/ib/adapters/tavor/
H A Dtavor.h330 uint32_t *sw_reset; member
H A Dtavor_hw.h52 * (CLR_INT), and the software reset register (SW_RESET).
/titanic_50/usr/src/uts/common/io/ib/adapters/tavor/
H A Dtavor.c1235 /* Setup Tavor Software Reset register (sw_reset) */ in tavor_hw_init()
1236 state->ts_cmd_regs.sw_reset = (uint32_t *) in tavor_hw_init()
2718 ddi_put32(state->ts_reg_cmdhdl, state->ts_cmd_regs.sw_reset, in tavor_sw_reset()
/titanic_50/usr/src/uts/common/sys/ib/adapters/hermon/
H A Dhermon.h328 uint32_t *sw_reset; member
H A Dhermon_hw.h69 * reset register (SW_RESET).
/titanic_50/usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/
H A D57712_reg.h19653 …RX IPG or less than four bytes. Sticky bit. Clears when SW writes 0 into the field or by sw_reset.