Searched +full:stm32f42xx +full:- +full:rcc (Results 1 – 3 of 3) sorted by relevance
2 * Copyright 2016 - Lee Jones <lee.jones@linaro.org>4 * This file is dual-licensed: you can use it either under the terms22 * MA 02110-1301 USA48 /dts-v1/;50 #include "stm32f469-pinctrl.dtsi"51 #include <dt-bindings/gpio/gpio.h>52 #include <dt-bindings/input/input.h>55 model = "STMicroelectronics STM32F469i-DISCO board";56 compatible = "st,stm32f469i-disco", "st,stm32f469";60 stdout-path = "serial0:115200n8";[all …]
2 * Copyright 2015 - Maxime Coquelin <mcoquelin.stm32@gmail.com>4 * This file is dual-licensed: you can use it either under the terms22 * MA 02110-1301 USA48 #include "../armv7-m.dtsi"49 #include <dt-bindings/clock/stm32fx-clock.h>50 #include <dt-bindings/mfd/stm32f4-rcc.h>53 #address-cells = <1>;54 #size-cells = <1>;57 clk_hse: clk-hse {58 #clock-cells = <0>;[all …]
1 // SPDX-License-Identifier: GPL-2.0-only5 * Inspired by clk-asm9260.c .9 #include <linux/clk-provider.h>26 #include <dt-bindings/clock/stm32fx-clock.h>52 #define NONE -1383 [STM32F4_PLL_SSC_DOWN_SPREAD] = "down-spread",384 [STM32F4_PLL_SSC_CENTER_SPREAD] = "center-spread",423 * The APBx dividers are power-of-two dividers and, if *not* running in 1:1440 if (readl(base + STM32F4_RCC_CFGR) & BIT(am->bit_idx)) in clk_apb_mul_recalc_rate()452 if (readl(base + STM32F4_RCC_CFGR) & BIT(am->bit_idx)) in clk_apb_mul_determine_rate()[all …]