Home
last modified time | relevance | path

Searched +full:startup +full:- +full:frequency (Results 1 – 25 of 312) sorted by relevance

12345678910>>...13

/linux/arch/powerpc/boot/dts/
H A Dps3.dts1 // SPDX-License-Identifier: GPL-2.0-only
9 /dts-v1/;
14 #size-cells = <2>;
15 #address-cells = <2>;
21 * We'll get the size of the bootmem block from lv1 after startup,
33 * dtc expects a clock-frequency and timebase-frequency entries, so
35 * startup with data from lv1.
38 * threads is with an ibm,ppc-interrupt-server#s entry. We'll put one
43 #size-cells = <0>;
44 #address-cells = <1>;
[all …]
/linux/arch/arm/boot/dts/ti/omap/
H A Domap3-evm-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 #include <dt-bindings/input/input.h>
7 #include "omap-gpmc-smsc911x.dtsi"
12 cpu0-supply = <&vcc>;
18 compatible = "regulator-fixed";
19 regulator-name = "hsusb2_vbus";
20 regulator-min-microvolt = <3300000>;
21 regulator-max-microvolt = <3300000>;
23 startup-delay-us = <70000>;
24 enable-active-high;
[all …]
H A Dlogicpd-torpedo-37xx-devkit.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 /dts-v1/;
6 #include "logicpd-torpedo-som.dtsi"
7 #include "omap-gpmc-smsc9221.dtsi"
8 #include "logicpd-torpedo-baseboard.dtsi"
12 compatible = "logicpd,dm3730-torpedo-devkit", "ti,omap3630", "ti,omap3";
15 compatible = "regulator-fixed";
16 regulator-name = "vwl1271";
17 regulator-min-microvolt = <1800000>;
18 regulator-max-microvolt = <1800000>;
[all …]
H A Dam335x-sancloud-bbe-extended-wifi.dts1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
6 /dts-v1/;
9 #include "am335x-bone-common.dtsi"
10 #include "am335x-boneblack-common.dtsi"
11 #include "am335x-sancloud-bbe-common.dtsi"
12 #include <dt-bindings/interrupt-controller/irq.h>
16 compatible = "sancloud,am335x-boneenhanced",
17 "ti,am335x-bone-black",
18 "ti,am335x-bone",
[all …]
/linux/Documentation/devicetree/bindings/fpga/
H A Dlattice-ice40-fpga-mgr.txt4 - compatible: Should contain "lattice,ice40-fpga-mgr"
5 - reg: SPI chip select
6 - spi-max-frequency: Maximum SPI frequency (>=1000000, <=25000000)
7 - cdone-gpios: GPIO input connected to CDONE pin
8 - reset-gpios: Active-low GPIO output connected to CRESET_B pin. Note
9 that unless the GPIO is held low during startup, the
16 compatible = "lattice,ice40-fpga-mgr";
18 spi-max-frequency = <1000000>;
19 cdone-gpios = <&gpio 24 GPIO_ACTIVE_HIGH>;
20 reset-gpios = <&gpio 22 GPIO_ACTIVE_LOW>;
/linux/Documentation/devicetree/bindings/clock/
H A Dfsl,plldig.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Wen He <wen.he_1@nxp.com>
19 const: fsl,ls1028a-plldig
27 '#clock-cells':
30 fsl,vco-hz:
31 description: Optional for VCO frequency of the PLL in Hertz. The VCO frequency
32 of this PLL cannot be changed during runtime only at startup. Therefore,
34 the requested frequency. To work around this restriction the user may specify
[all …]
/linux/arch/arm/boot/dts/marvell/
H A Darmada-xp-synology-ds414.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9 * The 0xf1000000 is the default used by the recent, DT-capable, U-Boot
12 * were delivered with an older version of u-boot that left internal
17 * installing it from u-boot prompt) or adjust the Devive Tree
21 /dts-v1/;
23 #include <dt-bindings/input/input.h>
24 #include <dt-bindings/gpio/gpio.h>
25 #include "armada-xp-mv78230.dtsi"
29 compatible = "synology,ds414", "marvell,armadaxp-mv78230",
30 "marvell,armadaxp", "marvell,armada-370-xp";
[all …]
H A Dkirkwood-synology.dtsi1 // SPDX-License-Identifier: GPL-2.0
12 pinctrl: pin-controller@10000 {
13 pmx_alarmled_12: pmx-alarmled-12 {
18 pmx_fanctrl_15: pmx-fanctrl-15 {
23 pmx_fanctrl_16: pmx-fanctrl-16 {
28 pmx_fanctrl_17: pmx-fanctrl-17 {
33 pmx_fanalarm_18: pmx-fanalarm-18 {
38 pmx_hddled_20: pmx-hddled-20 {
43 pmx_hddled_21: pmx-hddled-21 {
48 pmx_hddled_22: pmx-hddled-22 {
[all …]
/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6q-apalis-eval-v1.2.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
6 /dts-v1/;
8 #include "imx6q-apalis-eval.dtsi"
12 compatible = "toradex,apalis_imx6q-eval-v1.2", "toradex,apalis_imx6q",
15 reg_3v3_mmc: regulator-3v3-mmc {
16 compatible = "regulator-fixed";
17 enable-active-high;
19 off-on-delay-us = <100000>;
20 pinctrl-names = "default";
21 pinctrl-0 = <&pinctrl_enable_3v3_mmc>;
[all …]
H A Dimx6qdl-skov-cpu.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/leds/common.h>
10 stdout-path = &uart2;
19 mdio-gpio0 = &mdio;
28 iio-hwmon {
29 compatible = "iio-hwmon";
30 io-channels = <&adc 0>, /* 24V */
35 compatible = "gpio-leds";
37 led-0 {
[all …]
/linux/drivers/accessibility/speakup/
H A Dspeakup_ltlk.c1 // SPDX-License-Identifier: GPL-2.0+
6 * Copyright (C) 1998-99 Kirk Reiser.
34 [CAPS_STOP_ID] = { CAPS_STOP, .u.s = {"\x01-35p" } },
41 [FREQUENCY_ID] = { FREQUENCY, .u.n = {"\x01%df", 5, 0, 9, 0, 0, NULL } },
113 .startup = SYNTH_START,
144 synth->synth_immediate(synth, "\x18\x01?"); in synth_interrogate()
146 buf[i] = synth->io_ops->synth_in(synth); in synth_interrogate()
157 pr_info("%s: ROM version: %s\n", synth->long_name, rom_v); in synth_interrogate()
167 synth->alive = !failed; in synth_probe()
173 module_param_named(start, synth_ltlk.startup, short, 0444);
[all …]
/linux/arch/arm/mach-rockchip/
H A Dplatsmp.c1 // SPDX-License-Identifier: GPL-2.0-or-later
57 np = dev->of_node; in rockchip_get_core_reset()
92 ret = -1; in pmu_set_power_domain()
122 return -ENXIO; in rockchip_boot_secondary()
128 return -ENXIO; in rockchip_boot_secondary()
146 * (e.g: cpu frequency, bootrom frequency, sram frequency, ...) in rockchip_boot_secondary()
148 mdelay(1); /* ensure the cpus other than cpu0 to startup */ in rockchip_boot_secondary()
159 * rockchip_smp_prepare_sram - populate necessary sram block
160 * Starting cores execute the code residing at the start of the on-chip sram
161 * after power-on. Therefore make sure, this sram region is reserved and
[all …]
/linux/Documentation/devicetree/bindings/iio/proximity/
H A Dams,as3935.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Matt Ranostay <matt.ranostay@konsulko.com>
23 spi-max-frequency:
26 spi-cpha: true
31 ams,tuning-capacitor-pf:
42 Set the noise and watchdog threshold register on startup. This will
47 - compatible
48 - reg
[all …]
/linux/arch/arm/boot/dts/st/
H A Dste-ux500-samsung-golden.dts1 // SPDX-License-Identifier: GPL-2.0-only
2 /dts-v1/;
4 #include "ste-db8500.dtsi"
5 #include "ste-ab8505.dtsi"
6 #include "ste-dbx5x0-pinctrl.dtsi"
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/leds/common.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
14 * You need an intermediate, device-tree compatible bootloader
[all …]
H A Dste-ux500-samsung-gavini.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Devicetree for the Samsung Galaxy Beam GT-I8530 also known as Gavini.
6 /dts-v1/;
7 #include "ste-db8500.dtsi"
8 #include "ste-ab8500.dtsi"
9 #include "ste-dbx5x0-pinctrl.dtsi"
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/leds/common.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
[all …]
H A Dste-ux500-samsung-janice.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Devicetree for the Samsung Galaxy S Advance GT-I9070 also known as Janice.
6 /dts-v1/;
7 #include "ste-db8500.dtsi"
8 #include "ste-ab8500.dtsi"
9 #include "ste-dbx5x0-pinctrl.dtsi"
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/leds/common.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
[all …]
H A Dste-ux500-samsung-skomer.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Devicetree for the Samsung XCover 2 GT-S7710 also known as Skomer.
6 /dts-v1/;
7 #include "ste-db8500.dtsi"
8 #include "ste-ab8505.dtsi"
9 #include "ste-dbx5x0-pinctrl.dtsi"
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/leds/common.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
[all …]
/linux/sound/soc/
H A Dsoc-dai.c1 // SPDX-License-Identifier: GPL-2.0
3 // soc-dai.c
10 #include <sound/soc-dai.h>
11 #include <sound/soc-link.h>
17 return snd_soc_ret(dai->dev, ret, in _soc_dai_ret()
18 "at %s() on %s\n", func, dai->name); in _soc_dai_ret()
25 #define soc_dai_mark_push(dai, substream, tgt) ((dai)->mark_##tgt = substream)
26 #define soc_dai_mark_pop(dai, tgt) ((dai)->mark_##tgt = NULL)
27 #define soc_dai_mark_match(dai, substream, tgt) ((dai)->mark_##tgt == substream)
30 * snd_soc_dai_set_sysclk - configure DAI system or master clock.
[all …]
/linux/drivers/cpufreq/
H A Ds3c64xx-cpufreq.c1 // SPDX-License-Identifier: GPL-2.0-only
56 unsigned int new_freq = s3c64xx_freq_table[index].frequency; in s3c64xx_cpufreq_set_target()
63 old_freq = clk_get_rate(policy->clk) / 1000; in s3c64xx_cpufreq_set_target()
68 dvfs->vddarm_min, in s3c64xx_cpufreq_set_target()
69 dvfs->vddarm_max); in s3c64xx_cpufreq_set_target()
78 ret = clk_set_rate(policy->clk, new_freq * 1000); in s3c64xx_cpufreq_set_target()
88 dvfs->vddarm_min, in s3c64xx_cpufreq_set_target()
89 dvfs->vddarm_max); in s3c64xx_cpufreq_set_target()
93 if (clk_set_rate(policy->clk, old_freq * 1000) < 0) in s3c64xx_cpufreq_set_target()
101 pr_debug("Set actual frequency %lukHz\n", in s3c64xx_cpufreq_set_target()
[all …]
/linux/arch/arm64/boot/dts/rockchip/
H A Drk3588-orangepi-5.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/leds/common.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/pinctrl/rockchip.h>
12 #include <dt-bindings/usb/pd.h>
22 stdout-path = "serial2:1500000n8";
25 adc-keys-0 {
26 compatible = "adc-keys";
[all …]
H A Drk3588-armsom-w3.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 /dts-v1/;
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/leds/common.h>
7 #include <dt-bindings/soc/rockchip,vop2.h>
8 #include "rk3588-armsom-lm7.dtsi"
19 analog-sound {
20 compatible = "audio-graph-card";
21 label = "rk3588-es8316";
31 hp-det-gpio = <&gpio1 RK_PD5 GPIO_ACTIVE_HIGH>;
[all …]
H A Drk3399-kobol-helios64.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
13 /dts-v1/;
26 avdd_0v9_s0: regulator-avdd-0v9-s0 {
27 compatible = "regulator-fixed";
28 regulator-name = "avdd_0v9_s0";
29 regulator-always-on;
30 regulator-boot-on;
31 regulator-min-microvolt = <900000>;
32 regulator-max-microvolt = <900000>;
33 vin-supply = <&vcc1v8_sys_s3>;
[all …]
/linux/include/linux/clk/
H A Dat91_pmc.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
8 * Power Management Controller (PMC) - System peripherals registers.
57 #define AT91_PMC_UPLLCOUNT (0xf << 20) /* UTMI PLL Start-up Time */
59 #define AT91_PMC_BIASCOUNT (0xf << 28) /* UTMI BIAS Start-up Time */
65 #define AT91_PMC_PLL_UPDT_STUPTIM (0xff << 16) /* Startup time */
71 #define AT91_PMC_MOSCRCEN (1 << 3) /* Main On-Chip RC Oscillator Enable [some SAM9] */
72 #define AT91_PMC_OSCOUNT (0xff << 8) /* Main Oscillator Start-up Time */
78 #define AT91_CKGR_MCFR 0x24 /* Main Clock Frequency Register */
79 #define AT91_PMC_MAINF (0xffff << 0) /* Main Clock Frequency */
90 #define AT91_PMC_OUT (3 << 14) /* PLL Clock Frequency Range */
[all …]
/linux/arch/arm64/boot/dts/freescale/
H A Dimx8mm-ucm-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 /dts-v1/;
8 #include <dt-bindings/leds/common.h>
18 stdout-path = &uart3;
22 compatible = "pwm-backlight";
24 brightness-levels = <0 255>;
25 num-interpolated-steps = <255>;
26 default-brightness-level = <222>;
31 compatible = "gpio-leds";
32 pinctrl-names = "default";
[all …]
H A Dimx8mm-beacon-baseboard.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 #include <dt-bindings/phy/phy-imx8-pcie.h>
10 dmic_codec: dmic-codec {
11 compatible = "dmic-codec";
12 num-channels = <1>;
13 #sound-dai-cells = <0>;
17 compatible = "gpio-leds";
22 default-state = "off";
28 default-state = "off";
34 default-state = "off";
[all …]

12345678910>>...13