Home
last modified time | relevance | path

Searched full:sps (Results 1 – 25 of 122) sorted by relevance

12345

/linux/drivers/media/platform/allegro-dvt/
H A Dnal-h264.c11 * generator to generate the RBSP for SPS/PPS nal units and add them to the
198 static void nal_h264_rbsp_sps(struct rbsp *rbsp, struct nal_h264_sps *sps) in nal_h264_rbsp_sps() argument
202 if (!sps) { in nal_h264_rbsp_sps()
207 rbsp_bits(rbsp, 8, &sps->profile_idc); in nal_h264_rbsp_sps()
208 rbsp_bit(rbsp, &sps->constraint_set0_flag); in nal_h264_rbsp_sps()
209 rbsp_bit(rbsp, &sps->constraint_set1_flag); in nal_h264_rbsp_sps()
210 rbsp_bit(rbsp, &sps->constraint_set2_flag); in nal_h264_rbsp_sps()
211 rbsp_bit(rbsp, &sps->constraint_set3_flag); in nal_h264_rbsp_sps()
212 rbsp_bit(rbsp, &sps->constraint_set4_flag); in nal_h264_rbsp_sps()
213 rbsp_bit(rbsp, &sps->constraint_set5_flag); in nal_h264_rbsp_sps()
[all …]
H A Dnal-hevc.c11 * RBSP for VPS/SPS/PPS nal units and add them to the encoded stream if the
340 static void nal_hevc_rbsp_sps(struct rbsp *rbsp, struct nal_hevc_sps *sps) in nal_hevc_rbsp_sps() argument
344 rbsp_bits(rbsp, 4, &sps->video_parameter_set_id); in nal_hevc_rbsp_sps()
345 rbsp_bits(rbsp, 3, &sps->max_sub_layers_minus1); in nal_hevc_rbsp_sps()
346 rbsp_bit(rbsp, &sps->temporal_id_nesting_flag); in nal_hevc_rbsp_sps()
347 nal_hevc_rbsp_profile_tier_level(rbsp, &sps->profile_tier_level); in nal_hevc_rbsp_sps()
348 rbsp_uev(rbsp, &sps->seq_parameter_set_id); in nal_hevc_rbsp_sps()
350 rbsp_uev(rbsp, &sps->chroma_format_idc); in nal_hevc_rbsp_sps()
351 if (sps->chroma_format_idc == 3) in nal_hevc_rbsp_sps()
352 rbsp_bit(rbsp, &sps->separate_colour_plane_flag); in nal_hevc_rbsp_sps()
[all …]
H A Dallegro-core.c94 * because it needs to write SPS/PPS NAL units. The encoder writes the actual
1572 struct nal_h264_sps *sps; in allegro_h264_write_sps() local
1583 sps = kzalloc(sizeof(*sps), GFP_KERNEL); in allegro_h264_write_sps()
1584 if (!sps) in allegro_h264_write_sps()
1590 sps->profile_idc = nal_h264_profile(profile); in allegro_h264_write_sps()
1591 sps->constraint_set0_flag = 0; in allegro_h264_write_sps()
1592 sps->constraint_set1_flag = 1; in allegro_h264_write_sps()
1593 sps->constraint_set2_flag = 0; in allegro_h264_write_sps()
1594 sps->constraint_set3_flag = 0; in allegro_h264_write_sps()
1595 sps->constraint_set4_flag = 0; in allegro_h264_write_sps()
[all …]
/linux/drivers/media/platform/chips-media/coda/
H A Dcoda-h264.c36 /* Find SPS header */ in coda_sps_parse_profile()
239 * coda_h264_sps_fixup - fixes frame cropping values in h.264 SPS
243 * @buf: buffer containing h.264 SPS RBSP, starting with NAL header
247 * Rewrites the frame cropping values in an h.264 SPS RBSP correctly for the
259 struct rbsp sps; in coda_h264_sps_fixup() local
266 sps.buf = buf + 5; /* Skip NAL header */ in coda_h264_sps_fixup()
267 sps.size = *size - 5; in coda_h264_sps_fixup()
269 profile_idc = sps.buf[0]; in coda_h264_sps_fixup()
272 sps.pos = 24; in coda_h264_sps_fixup()
275 ret = rbsp_read_uev(&sps, NULL); in coda_h264_sps_fixup()
[all …]
/linux/drivers/pmdomain/actions/
H A Dowl-sps.c3 * Actions Semi Owl Smart Power System (SPS)
16 #include <linux/soc/actions/owl-sps.h>
46 struct owl_sps *sps; member
56 return owl_sps_set_pg(pd->sps->base, pwr_mask, ack_mask, enable); in owl_sps_set_power()
63 dev_dbg(pd->sps->dev, "%s power on", pd->info->name); in owl_sps_power_on()
72 dev_dbg(pd->sps->dev, "%s power off", pd->info->name); in owl_sps_power_off()
77 static int owl_sps_init_domain(struct owl_sps *sps, int index) in owl_sps_init_domain() argument
81 pd = devm_kzalloc(sps->dev, sizeof(*pd), GFP_KERNEL); in owl_sps_init_domain()
85 pd->info = &sps->info->domains[index]; in owl_sps_init_domain()
86 pd->sps = sps; in owl_sps_init_domain()
[all …]
H A DMakefile2 obj-$(CONFIG_OWL_PM_DOMAINS_HELPER) += owl-sps-helper.o
3 obj-$(CONFIG_OWL_PM_DOMAINS) += owl-sps.o
H A DKconfig8 bool "Actions Semi SPS power domains"
13 Say 'y' here to enable support for Smart Power System (SPS)
/linux/drivers/media/platform/verisilicon/
H A Dhantro_g2_hevc_dec.c16 const struct v4l2_ctrl_hevc_sps *sps = ctrls->sps; in prepare_tile_info_buffer() local
30 max_log2_ctb_size = sps->log2_min_luma_coding_block_size_minus3 + 3 + in prepare_tile_info_buffer()
31 sps->log2_diff_max_min_luma_coding_block_size; in prepare_tile_info_buffer()
32 pic_width_in_ctbs = (sps->pic_width_in_luma_samples + in prepare_tile_info_buffer()
34 pic_height_in_ctbs = (sps->pic_height_in_luma_samples + (1 << max_log2_ctb_size) - 1) in prepare_tile_info_buffer()
110 const struct v4l2_ctrl_hevc_sps *sps = ctrls->sps; in compute_header_skip_length() local
118 if (sps->flags & V4L2_HEVC_SPS_FLAG_SEPARATE_COLOUR_PLANE) in compute_header_skip_length()
124 skip += sps->log2_max_pic_order_cnt_lsb_minus4 + 4; in compute_header_skip_length()
132 else if (sps->num_short_term_ref_pic_sets > 1) in compute_header_skip_length()
133 skip += fls(sps->num_short_term_ref_pic_sets - 1); in compute_header_skip_length()
[all …]
H A Dhantro_g1_h264_dec.c26 const struct v4l2_ctrl_h264_sps *sps = ctrls->sps; in set_params() local
33 if (sps->flags & V4L2_H264_SPS_FLAG_MB_ADAPTIVE_FRAME_FIELD) in set_params()
35 if (sps->profile_idc > 66) { in set_params()
41 if (!(sps->flags & V4L2_H264_SPS_FLAG_FRAME_MBS_ONLY) && in set_params()
42 (sps->flags & V4L2_H264_SPS_FLAG_MB_ADAPTIVE_FRAME_FIELD || in set_params()
54 G1_REG_DEC_CTRL1_REF_FRAMES(sps->max_num_ref_frames); in set_params()
63 if (!(sps->flags & V4L2_H264_SPS_FLAG_FRAME_MBS_ONLY)) in set_params()
74 reg = G1_REG_DEC_CTRL4_FRAMENUM_LEN(sps->log2_max_frame_num_minus4 + 4) | in set_params()
79 if (sps->flags & V4L2_H264_SPS_FLAG_DIRECT_8X8_INFERENCE) in set_params()
81 if (sps->profile_idc >= 100 && sps->chroma_format_idc == 0) in set_params()
[all …]
H A Dhantro_g2.c63 const struct v4l2_ctrl_hevc_sps *sps = ctrls->sps; in hantro_g2_mv_size() local
67 max_log2_ctb_size = sps->log2_min_luma_coding_block_size_minus3 + 3 + in hantro_g2_mv_size()
68 sps->log2_diff_max_min_luma_coding_block_size; in hantro_g2_mv_size()
69 pic_width_in_ctbs = (sps->pic_width_in_luma_samples + in hantro_g2_mv_size()
71 pic_height_in_ctbs = (sps->pic_height_in_luma_samples + (1 << max_log2_ctb_size) - 1) in hantro_g2_mv_size()
H A Dhantro_hevc.c81 const struct v4l2_ctrl_hevc_sps *sps = ctrls->sps; in tile_buffer_reallocate() local
83 unsigned int height64 = (sps->pic_height_in_luma_samples + 63) & ~63; in tile_buffer_reallocate()
157 static int hantro_hevc_validate_sps(struct hantro_ctx *ctx, const struct v4l2_ctrl_hevc_sps *sps) in hantro_hevc_validate_sps() argument
165 ALIGN(sps->pic_width_in_luma_samples, ctx->vpu_dst_fmt->frmsize.step_width)) in hantro_hevc_validate_sps()
169 ALIGN(sps->pic_height_in_luma_samples, ctx->vpu_dst_fmt->frmsize.step_height)) in hantro_hevc_validate_sps()
194 ctrls->sps = in hantro_hevc_dec_prepare_run()
196 if (WARN_ON(!ctrls->sps)) in hantro_hevc_dec_prepare_run()
199 ret = hantro_hevc_validate_sps(ctx, ctrls->sps); in hantro_hevc_dec_prepare_run()
H A Drockchip_vpu2_hw_h264_dec.c197 const struct v4l2_ctrl_h264_sps *sps = ctrls->sps; in set_params() local
238 VDPU_REG_PIC_INTERLACE_E(!(sps->flags & V4L2_H264_SPS_FLAG_FRAME_MBS_ONLY) && in set_params()
239 (sps->flags & V4L2_H264_SPS_FLAG_MB_ADAPTIVE_FRAME_FIELD || in set_params()
243 VDPU_REG_WRITE_MVS_E((sps->profile_idc > 66) && dec_param->nal_ref_idc) | in set_params()
244 VDPU_REG_SEQ_MBAFF_E(sps->flags & V4L2_H264_SPS_FLAG_MB_ADAPTIVE_FRAME_FIELD) | in set_params()
245 VDPU_REG_PICORD_COUNT_E(sps->profile_idc > 66) | in set_params()
268 VDPU_REG_REF_FRAMES(sps->max_num_ref_frames); in set_params()
273 VDPU_REG_FRAMENUM_LEN(sps->log2_max_frame_num_minus4 + 4) | in set_params()
288 VDPU_REG_DIR_8X8_INFER_E(sps->flags & V4L2_H264_SPS_FLAG_DIRECT_8X8_INFERENCE) | in set_params()
289 VDPU_REG_BLACKWHITE_E(sps->profile_idc >= 100 && sps->chroma_format_idc == 0) | in set_params()
[all …]
/linux/sound/soc/sof/
H A Dstream-ipc.c30 struct snd_sof_pcm_stream *sps, in sof_ipc_msg_data() argument
33 if (!sps || !sdev->stream_box.size) { in sof_ipc_msg_data()
38 if (sps->substream) { in sof_ipc_msg_data()
39 struct sof_stream *stream = sps->substream->runtime->private_data; in sof_ipc_msg_data()
48 struct sof_compr_stream *sstream = sps->cstream->runtime->private_data; in sof_ipc_msg_data()
64 struct snd_sof_pcm_stream *sps, in sof_set_stream_data_offset() argument
74 if (sps->substream) { in sof_set_stream_data_offset()
75 struct sof_stream *stream = sps->substream->runtime->private_data; in sof_set_stream_data_offset()
79 sps->substream->stream, posn_offset); in sof_set_stream_data_offset()
80 } else if (sps in sof_set_stream_data_offset()
[all...]
/linux/Documentation/devicetree/bindings/power/
H A Dactions,owl-sps.txt1 Actions Semi Owl Smart Power System (SPS)
4 - compatible : "actions,s500-sps" for S500
5 "actions,s700-sps" for S700
6 "actions,s900-sps" for S900
17 sps: power-controller@b01b0100 {
18 compatible = "actions,s500-sps";
/linux/drivers/staging/media/sunxi/cedrus/
H A Dcedrus_h265.c420 const struct v4l2_ctrl_hevc_sps *sps; in cedrus_h265_setup() local
439 sps = run->h265.sps; in cedrus_h265_setup()
457 sps->log2_min_luma_coding_block_size_minus3 + 3 + in cedrus_h265_setup()
458 sps->log2_diff_max_min_luma_coding_block_size; in cedrus_h265_setup()
461 DIV_ROUND_UP(sps->pic_width_in_luma_samples, ctb_size_luma); in cedrus_h265_setup()
566 /* SPS. */ in cedrus_h265_setup()
568 …reg = VE_DEC_H265_DEC_SPS_HDR_MAX_TRANSFORM_HIERARCHY_DEPTH_INTRA(sps->max_transform_hierarchy_dep… in cedrus_h265_setup()
569 …VE_DEC_H265_DEC_SPS_HDR_MAX_TRANSFORM_HIERARCHY_DEPTH_INTER(sps->max_transform_hierarchy_depth_int… in cedrus_h265_setup()
570 …VE_DEC_H265_DEC_SPS_HDR_LOG2_DIFF_MAX_MIN_TRANSFORM_BLOCK_SIZE(sps->log2_diff_max_min_luma_transfo… in cedrus_h265_setup()
571 …VE_DEC_H265_DEC_SPS_HDR_LOG2_MIN_TRANSFORM_BLOCK_SIZE_MINUS2(sps->log2_min_luma_transform_block_si… in cedrus_h265_setup()
[all …]
H A Dcedrus_h264.c91 const struct v4l2_ctrl_h264_sps *sps = run->h264.sps; in cedrus_write_frame_list() local
143 const struct v4l2_ctrl_h264_sps *sps = run->h264.sps; in cedrus_write_frame_list() local
148 if (!(sps->flags & V4L2_H264_SPS_FLAG_DIRECT_8X8_INFERENCE)) in cedrus_write_frame_list()
150 if (!(sps->flags & V4L2_H264_SPS_FLAG_FRAME_MBS_ONLY)) in cedrus_write_frame_list()
169 else if (sps->flags & V4L2_H264_SPS_FLAG_MB_ADAPTIVE_FRAME_FIELD) in cedrus_write_frame_list()
347 const struct v4l2_ctrl_h264_sps *sps = run->h264.sps; in cedrus_set_params() local
423 reg |= (sps->chroma_format_idc & 0x7) << 19; in cedrus_set_params()
424 reg |= (sps->pic_width_in_mbs_minus1 & 0xff) << 8; in cedrus_set_params()
425 reg |= sps->pic_height_in_map_units_minus1 & 0xff; in cedrus_set_params()
426 if (sps->flags & V4L2_H264_SPS_FLAG_FRAME_MBS_ONLY) in cedrus_set_params()
[all …]
H A Dcedrus.c34 const struct v4l2_ctrl_h264_sps *sps = ctrl->p_new.p_h264_sps; in cedrus_try_ctrl() local
36 if (sps->chroma_format_idc != 1) in cedrus_try_ctrl()
39 if (sps->bit_depth_luma_minus8 != sps->bit_depth_chroma_minus8) in cedrus_try_ctrl()
42 if (sps->bit_depth_luma_minus8 != 0) in cedrus_try_ctrl()
46 const struct v4l2_ctrl_hevc_sps *sps = ctrl->p_new.p_hevc_sps; in cedrus_try_ctrl() local
51 if (sps->chroma_format_idc != 1) in cedrus_try_ctrl()
55 bit_depth = max(sps->bit_depth_luma_minus8, in cedrus_try_ctrl()
56 sps->bit_depth_chroma_minus8) + 8; in cedrus_try_ctrl()
/linux/drivers/media/platform/mediatek/vcodec/decoder/vdec/
H A Dvdec_h264_req_multi_if.c34 * @sps: h264 sps syntax parameters
42 struct mtk_h264_sps_param sps; member
115 * @sps: sequence header information from user space
123 struct v4l2_ctrl_h264_sps sps; member
179 const struct v4l2_ctrl_h264_sps *sps; in vdec_h264_slice_fill_decode_parameters() local
192 sps = mtk_vdec_h264_get_ctrl_ptr(inst->ctx, V4L2_CID_STATELESS_H264_SPS); in vdec_h264_slice_fill_decode_parameters()
193 if (IS_ERR(sps)) in vdec_h264_slice_fill_decode_parameters()
194 return PTR_ERR(sps); in vdec_h264_slice_fill_decode_parameters()
206 mtk_vdec_h264_copy_sps_params(&slice_param->sps, sps); in vdec_h264_slice_fill_decode_parameters()
210 memcpy(&share_info->sps, sps, sizeof(*sps)); in vdec_h264_slice_fill_decode_parameters()
[all …]
H A Dvdec_h264_req_if.c20 struct mtk_h264_sps_param sps; member
99 const struct v4l2_ctrl_h264_sps *sps; in get_vdec_decode_parameters() local
116 sps = mtk_vdec_h264_get_ctrl_ptr(inst->ctx, V4L2_CID_STATELESS_H264_SPS); in get_vdec_decode_parameters()
117 if (IS_ERR(sps)) in get_vdec_decode_parameters()
118 return PTR_ERR(sps); in get_vdec_decode_parameters()
131 mtk_vdec_h264_copy_sps_params(&slice_param->sps, sps); in get_vdec_decode_parameters()
140 v4l2_h264_init_reflist_builder(&reflist_builder, dec_params, sps, in get_vdec_decode_parameters()
H A Dvdec_hevc_req_multi_if.c22 /* get used parameters for sps/pps */
55 * struct mtk_hevc_sps_param - parameters for sps
237 * @sps: hevc sps syntax parameters
245 struct mtk_hevc_sps_param sps; member
330 * @sps: sequence header information from user space
336 struct v4l2_ctrl_hevc_sps sps; member
594 const struct v4l2_ctrl_hevc_sps *sps; in vdec_hevc_slice_fill_decode_parameters() local
607 sps = vdec_hevc_get_ctrl_ptr(inst->ctx, V4L2_CID_STATELESS_HEVC_SPS); in vdec_hevc_slice_fill_decode_parameters()
608 if (IS_ERR(sps)) in vdec_hevc_slice_fill_decode_parameters()
609 return PTR_ERR(sps); in vdec_hevc_slice_fill_decode_parameters()
[all …]
/linux/drivers/iio/pressure/
H A Dhsc030pa_i2c.c7 …content/dam/honeywell-edam/sps/siot/en-us/products/sensors/pressure-sensors/board-mount-pressure-s…
8 ….honeywell.com/content/dam/honeywell-edam/sps/siot/en-us/products/sensors/pressure-sensors/common/…
/linux/arch/arm/mach-actions/
H A Dplatsmp.c18 #include <linux/soc/actions/owl-sps.h>
113 node = of_find_compatible_node(NULL, NULL, "actions,s500-sps"); in s500_smp_prepare_cpus()
115 pr_err("%s: missing sps\n", __func__); in s500_smp_prepare_cpus()
121 pr_err("%s: could not map sps registers\n", __func__); in s500_smp_prepare_cpus()
/linux/drivers/misc/mei/
H A Dhw-me.h97 * SPS firmware exclusion.
101 * SPS firmware exclusion.
104 * SPS firmware exclusion.
110 * SPS firmware exclusion.
/linux/drivers/staging/media/rkvdec/
H A Drkvdec-h264.c109 const struct v4l2_ctrl_h264_sps *sps; member
637 const struct v4l2_ctrl_h264_sps *sps = run->sps; in assemble_hw_pps() local
648 * HW read the SPS/PPS information from PPS packet index by PPS id. in assemble_hw_pps()
650 * packet unit). so the driver copy SPS/PPS information to the exact PPS in assemble_hw_pps()
657 /* write sps */ in assemble_hw_pps()
661 WRITE_PPS(sps->chroma_format_idc, CHROMA_FORMAT_IDC); in assemble_hw_pps()
662 WRITE_PPS(sps->bit_depth_luma_minus8, BIT_DEPTH_LUMA); in assemble_hw_pps()
663 WRITE_PPS(sps->bit_depth_chroma_minus8, BIT_DEPTH_CHROMA); in assemble_hw_pps()
665 WRITE_PPS(sps->log2_max_frame_num_minus4, LOG2_MAX_FRAME_NUM_MINUS4); in assemble_hw_pps()
666 WRITE_PPS(sps->max_num_ref_frames, MAX_NUM_REF_FRAMES); in assemble_hw_pps()
[all …]
/linux/fs/dlm/
H A Dconfig.c90 struct dlm_spaces *sps; member
406 struct dlm_spaces *sps = NULL; in make_cluster() local
410 sps = kzalloc(sizeof(struct dlm_spaces), GFP_NOFS); in make_cluster()
413 if (!cl || !sps || !cms) in make_cluster()
416 cl->sps = sps; in make_cluster()
420 config_group_init_type_name(&sps->ss_group, "spaces", &spaces_type); in make_cluster()
423 configfs_add_default_group(&sps->ss_group, &cl->group); in make_cluster()
440 space_list = &sps->ss_group; in make_cluster()
446 kfree(sps); in make_cluster()
467 kfree(cl->sps); in release_cluster()

12345