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12

/freebsd/sys/contrib/device-tree/Bindings/clock/
H A Dxlnx,clocking-wizard.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/xlnx,clocking-wizar
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H A Dsilabs,si544.txt7 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
9 https://www.silabs.com/documents/public/data-sheets/si544-datasheet.pdf
12 - compatible: One of "silabs,si514a", "silabs,si514b" "silabs,si514c" according
13 to the speed grade of the chip.
14 - reg: I2C device address.
15 - #clock-cells: From common clock bindings: Shall be 0.
18 - clock-output-names: From common clock bindings. Recommended to be "si544".
21 si544: clock-controller@55 {
23 #clock-cells = <0>;
H A Dsilabs,si5341.txt6 https://www.silabs.com/documents/public/data-sheets/Si5341-40-D-DataSheet.pdf
8 https://www.silabs.com/documents/public/reference-manuals/Si5341-40-D-RM.pdf
10 https://www.silabs.com/documents/public/reference-manuals/Si5345-44-42-D-RM.pdf
21 chip at boot, in case you have a (pre-)programmed device. If the PLL is not
25 The device type, speed grade and revision are determined runtime by probing.
33 - compatible: shall be one of the following:
34 "silabs,si5340" - Si5340 A/B/C/D
35 "silabs,si5341" - Si5341 A/B/C/D
36 "silabs,si5342" - Si5342 A/B/C/D
37 "silabs,si5344" - Si5344 A/B/C/D
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/freebsd/sys/contrib/device-tree/Bindings/cpufreq/
H A Dimx-cpufreq-dt.txt1 i.MX CPUFreq-DT OPP bindings
5 "speed grading" value which are written in fuses. These bits are combined with
6 the opp-supported-hw values for each OPP to check if the OPP is allowed.
9 --------------------
11 For each opp entry in 'operating-points-v2' table:
12 - opp-supported-hw: Two bitmaps indicating:
13 - Supported speed grade mask
14 - Supported market segment mask
21 --------
24 compatible = "operating-points-v2";
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/freebsd/sys/contrib/device-tree/Bindings/nvmem/
H A Dimx-ocotp.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/nvmem/imx-ocotp.yaml#
5 $schema: http://devicetree.org/meta-schema
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/freebsd/sys/contrib/device-tree/src/arm/ti/omap/
H A Domap34xx.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/bus/ti-sysc.h>
9 #include <dt-bindings/media/omap3-isp.h>
16 /* OMAP343x/OMAP35xx variants OPP1-
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H A Dam5729-beagleboneai.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2014-2019 Texas Instruments Incorporated - http://www.ti.com/
6 /dts-v1/;
9 #include "am57xx-commercial-grade.dtsi"
10 #include "dra74x-mm
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H A Dam57xx-beagle-x15-common.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2014-2016 Texas Instruments Incorporated - https://www.ti.com/
5 /dts-v1/;
8 #include "am57xx-commercial-grade.dtsi"
9 #include "dra74x-mmc-iodelay.dtsi"
10 #include "dra74-ipu-dsp-common.dtsi"
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
15 compatible = "ti,am572x-beagle-x15", "ti,am5728", "ti,dra742", "ti,dra74", "ti,dra7";
25 stdout-path = &uart3;
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/freebsd/sys/contrib/device-tree/src/arm/nxp/imx/
H A Dimx6sll.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
4 * Copyright 2017-2018 NXP.
8 #include <dt-bindings/clock/imx6sll-clock.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include "imx6sll-pinfunc.h"
14 #address-cells = <1>;
15 #size-cells = <1>;
46 #address-cells = <1>;
47 #size-cells = <0>;
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H A Dimx6sl.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 #include <dt-bindings/interrupt-controller/irq.h>
6 #include "imx6sl-pinfunc.h"
7 #include <dt-bindings/clock/imx6sl-clock.h>
10 #address-cells = <1>;
11 #size-cells = <1>;
14 * pre-existing /chosen node to be available to insert the
50 #address-cells = <1>;
51 #size-cells = <0>;
54 compatible = "arm,cortex-a9";
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H A Dimx6ul.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 #include <dt-bindings/clock/imx6ul-clock.h>
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/interrupt-controller/arm-gi
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H A Dimx6qdl.dtsi1 // SPDX-License-Identifier: GPL-2.0+
6 #include <dt-bindings/clock/imx6qdl-clock.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #address-cell
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H A Dimx6sx.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 #include <dt-bindings/clock/imx6sx-clock.h>
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/interrupt-controller/arm-gi
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/freebsd/sys/contrib/device-tree/src/arm64/freescale/
H A Dimx8mq.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 * Copyright (C) 2017-2018 Pengutronix, Lucas Stach <kernel@pengutronix.de>
7 #include <dt-bindings/clock/imx8mq-clock.h>
8 #include <dt-bindings/power/imx8mq-power.h>
9 #include <dt-bindings/reset/imx8mq-rese
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H A Dimx8mm.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx8mm-clock.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/interrupt-controller/arm-gi
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H A Dimx8mn.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx8mn-clock.h>
7 #include <dt-bindings/power/imx8mn-power.h>
8 #include <dt-bindings/reset/imx8mq-reset.h>
9 #include <dt-binding
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H A Dimx8mp.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx8mp-clock.h>
7 #include <dt-bindings/power/imx8mp-power.h>
8 #include <dt-bindings/reset/imx8mp-reset.h>
9 #include <dt-binding
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/freebsd/share/dict/
H A Dweb2a12 A-b-c book
13 A-b-c method
14 abdomino-uterotomy
15 Abdul-baha
16 a-be
20 able-bodied
21 able-bodiedness
22 able-minded
23 able-mindedness
27 Abor-miri
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/freebsd/sys/contrib/device-tree/src/arm64/allwinner/
H A Dsun50i-h6.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/clock/sun50i-h6-ccu.h>
6 #include <dt-bindings/clock/sun50i-h6-r-ccu.h>
7 #include <dt-bindings/clock/sun6i-rtc.h>
8 #include <dt-bindings/clock/sun8i-de2.h>
9 #include <dt-bindings/clock/sun8i-tcon-top.h>
10 #include <dt-bindings/reset/sun50i-h6-ccu.h>
11 #include <dt-bindings/reset/sun50i-h6-r-ccu.h>
12 #include <dt-bindings/reset/sun8i-de2.h>
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/freebsd/contrib/llvm-project/llvm/lib/Support/
H A Dxxhash.cpp2 * xxHash - Extremely Fast Hash algorithm
3 * Copyright (C) 2012-2023, Yann Collet
5 * BSD 2-Clause License (http://www.opensource.org/licenses/bsd-license.php)
31 * - xxHash homepage: http://www.xxhash.com
32 * - xxHash source repository : https://github.com/Cyan4973/xxHash
67 return (X << R) | (X >> (64 - R)); in rotl64()
111 const unsigned char *const Limit = BEnd - 32; in xxHash64()
115 uint64_t V4 = Seed - PRIME64_1; in xxHash64()
171 // clang-format off
186 // clang-format on
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/freebsd/contrib/pam_modules/pam_passwdqc/
H A Dwordset_4k.c6 * I've replaced two 7-character words to save space.
1707 "grade",
3412 "speed",
/freebsd/sys/contrib/zstd/lib/common/
H A Dxxhash.h2 * xxHash - Fast Hash algorithm
6 * - xxHash homepage: http://www.xxhash.com
7 * - xxHash source repository : https://github.com/Cyan4973/xxHash
9 * This source code is licensed under both the BSD-style license (found in the
12 * You may select, at your option, one of the above-listed licenses.
33 xxHash is an extremely fast hash algorithm, running at RAM speed limits.
38 Name Speed Q.Score Author
49 MD5-32 0.33 GB/s 10 Ronald L. Rivest
50 SHA1-32 0.28 GB/s 10
57 Other speed-oriented implementations can be faster,
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/freebsd/contrib/wpa/wpa_supplicant/
H A DChangeLog3 2024-07-20 - v2.11
4 * Wi-Fi Easy Connect
5 - add support for DPP release 3
6 - allow Configurator parameters to be provided during config exchange
8 - add support for GCM-AES-256 cipher suite
9 - remove incorrect EAP Session-Id length constraint
10 - add hardware offload support for additional drivers
11 * HE/IEEE 802.11ax/Wi-Fi 6
12 - support BSS color updates
13 - various fixes
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/freebsd/sbin/ipfw/
H A Dipfw.88 in-kernel NAT.
19 .Op Ar rule | first-last ...
49 .Oo Cm set Ar N Oc Cm table Ar name Cm create Ar create-options
55 .Oo Cm set Ar N Oc Cm table Ar name Cm modify Ar modify-options
59 .Oo Cm set Ar N Oc Cm table Ar name Cm add Ar table-key Op Ar value
61 .Oo Cm set Ar N Oc Cm table Ar name Cm add Op Ar table-key Ar value ...
63 .Oo Cm set Ar N Oc Cm table Ar name Cm atomic add Op Ar table-key Ar value ...
65 .Oo Cm set Ar N Oc Cm table Ar name Cm delete Op Ar table-key ...
93 .Ar config-options
99 .Ss IN-KERNEL NAT
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/freebsd/sys/dev/sfxge/common/
H A Defx_regs_mcdi.h1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright 2008-2013 Solarflare Communications Inc. All rights reserved.
32 /* Power-on reset state */
54 /* The 'doorbell' addresses are hard-wired to alert the MC when written */
57 /* The rest of these are firmware-defined */
65 /* Values to be written to the per-port status dword in shared
94 * | | \--- Response
95 * | \------- Error
96 * \------------------------------ Resync (always set)
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