/freebsd/sys/contrib/device-tree/Bindings/iommu/ |
H A D | arm,smmu.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 4 $id: http://devicetree.org/schemas/iommu/arm,smmu.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Will Deacon <will@kernel.org> 11 - Robin Murphy <Robin.Murphy@arm.com> 18 The SMMU may also raise interrupts in response to various fault 23 pattern: "^iommu@[0-9a-f]*" 26 - description: Qcom SoCs implementing "arm,smmu-v2" 28 - enum: [all …]
|
H A D | qcom,iommu.txt | 1 * QCOM IOMMU v1 Implementation 3 Qualcomm "B" family devices which are not compatible with arm-smmu have 6 to non-secure vs secure interrupt line. 10 - compatible : Should be one of: 12 "qcom,msm8916-iommu" 13 "qcom,msm8953-iommu" 15 Followed by "qcom,msm-iommu-v1". 17 - clock-names : Should be a pair of "iface" (required for IOMMUs 21 - clocks : Phandles for respective clocks described by 22 clock-names. [all …]
|
H A D | qcom,iommu.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Konrad Dybcio <konradybcio@kernel.org> 13 Qualcomm "B" family devices which are not compatible with arm-smmu have 16 to non-secure vs secure interrupt line. 21 - items: 22 - enum: 23 - qcom,msm8916-iommu 24 - qcom,msm8953-iommu [all …]
|
/freebsd/sys/contrib/device-tree/src/arm64/arm/ |
H A D | juno-base.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include "juno-clocks.dtsi" 3 #include "juno-motherboard.dtsi" 11 compatible = "arm,armv7-timer-mem"; 13 clock-frequency = <50000000>; 14 #address-cells = <1>; 15 #size-cells = <1>; 19 frame-number = <1>; 31 #mbox-cells = <1>; 33 clock-names = "apb_pclk"; [all …]
|
H A D | fvp-base-revc.dts | 1 // SPDX-License-Identifier: GPL-2.0 5 * Architecture Envelope Model (AEM) ARMv8-A 11 /dts-v1/; 13 #include <dt-bindings/interrupt-controller/arm-gic.h> 17 #include "rtsm_ve-motherboard.dtsi" 18 #include "rtsm_ve-motherboard-rs2.dtsi" 22 compatible = "arm,fvp-base-revc", "arm,vexpress"; 23 interrupt-parent = <&gic>; 24 #address-cells = <2>; 25 #size-cells = <2>; [all …]
|
/freebsd/sys/contrib/device-tree/src/arm64/xilinx/ |
H A D | zynqmp.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 5 * (C) Copyright 2014 - 2021, Xilinx, Inc. 15 #include <dt-bindings/dma/xlnx-zynqmp-dpdma.h> 16 #include <dt-bindings/gpio/gpio.h> 17 #include <dt-bindings/interrupt-controller/arm-gic.h> 18 #include <dt-bindings/interrupt-controller/irq.h> 19 #include <dt-bindings/power/xlnx-zynqmp-power.h> 20 #include <dt-bindings/reset/xlnx-zynqmp-resets.h> 24 #address-cells = <2>; 25 #size-cells = <2>; [all …]
|
/freebsd/sys/contrib/device-tree/src/arm64/intel/ |
H A D | socfpga_agilex.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 6 /dts-v1/; 7 #include <dt-bindings/reset/altr,rst-mgr-s10.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/clock/agilex-clock.h> 13 compatible = "intel,socfpga-agilex"; 14 #address-cells = <2>; 15 #size-cells = <2>; 17 reserved-memory { [all …]
|
/freebsd/sys/contrib/device-tree/src/arm64/altera/ |
H A D | socfpga_stratix10.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 6 /dts-v1/; 7 #include <dt-bindings/reset/altr,rst-mgr-s10.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/clock/stratix10-clock.h> 12 compatible = "altr,socfpga-stratix10"; 13 #address-cells = <2>; 14 #size-cells = <2>; 16 reserved-memory { 17 #address-cells = <2>; [all …]
|
/freebsd/sys/contrib/device-tree/src/arm64/qcom/ |
H A D | sdm630.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 7 #include <dt-bindings/clock/qcom,gcc-sdm660.h> 8 #include <dt-bindings/clock/qcom,gpucc-sdm660.h> 9 #include <dt-bindings/clock/qcom,mmcc-sdm660.h> 10 #include <dt-bindings/clock/qcom,rpmcc.h> 11 #include <dt-bindings/firmware/qcom,scm.h> 12 #include <dt-bindings/interconnect/qcom,sdm660.h> 13 #include <dt-bindings/power/qcom-rpmpd.h> 14 #include <dt-bindings/gpio/gpio.h> 15 #include <dt-bindings/interrupt-controller/arm-gic.h> [all …]
|
H A D | msm8996-xiaomi-scorpio.dts | 1 // SPDX-License-Identifier: BSD-3-Clause 6 /dts-v1/; 8 #include "msm8996-xiaomi-common.dtsi" 10 #include <dt-bindings/sound/qcom,q6afe.h> 11 #include <dt-bindings/sound/qcom,q6asm.h> 12 #include <dt-bindings/sound/qcom,wcd9335.h> 17 chassis-type = "handset"; 18 qcom,msm-id = <305 0x10000>; 19 qcom,board-id = <34 0>; 22 #address-cells = <2>; [all …]
|
H A D | msm8996pro-xiaomi-scorpio.dts | 1 // SPDX-License-Identifier: BSD-3-Clause 6 /dts-v1/; 9 #include "msm8996-xiaomi-common.dtsi" 11 #include <dt-bindings/sound/qcom,q6afe.h> 12 #include <dt-bindings/sound/qcom,q6asm.h> 13 #include <dt-bindings/sound/qcom,wcd9335.h> 18 chassis-type = "handset"; 19 qcom,msm-id = <305 0x10000>; 20 qcom,board-id = <34 0>; 23 #address-cells = <2>; [all …]
|
H A D | msm8998.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 4 #include <dt-bindings/interrupt-controller/arm-gic.h> 5 #include <dt-bindings/clock/qcom,gcc-msm8998.h> 6 #include <dt-bindings/clock/qcom,gpucc-msm8998.h> 7 #include <dt-bindings/clock/qcom,mmcc-msm8998.h> 8 #include <dt-bindings/clock/qcom,rpmcc.h> 9 #include <dt-bindings/firmware/qcom,scm.h> 10 #include <dt-bindings/power/qcom-rpmpd.h> 11 #include <dt-bindings/gpio/gpio.h> 14 interrupt-parent = <&intc>; [all …]
|
H A D | msm8996.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (c) 2014-2015, The Linux Foundation. All rights reserved. 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/clock/qcom,gcc-msm8996.h> 8 #include <dt-bindings/clock/qcom,mmcc-msm8996.h> 9 #include <dt-bindings/clock/qcom,rpmcc.h> 10 #include <dt-bindings/interconnect/qcom,msm8996.h> 11 #include <dt-bindings/interconnect/qcom,msm8996-cbf.h> 12 #include <dt-bindings/firmware/qcom,scm.h> 13 #include <dt-bindings/gpio/gpio.h> [all …]
|
H A D | sm6115.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 6 #include <dt-bindings/clock/qcom,gcc-sm6115.h> 7 #include <dt-bindings/clock/qcom,sm6115-dispcc.h> 8 #include <dt-bindings/clock/qcom,sm6115-gpucc.h> 9 #include <dt-bindings/clock/qcom,rpmcc.h> 10 #include <dt-bindings/dma/qcom-gpi.h> 11 #include <dt-bindings/firmware/qcom,scm.h> 12 #include <dt-bindings/gpio/gpio.h> 13 #include <dt-bindings/interconnect/qcom,rpm-icc.h> 14 #include <dt-bindings/interconnect/qcom,sm6115.h> [all …]
|
H A D | sm6350.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 7 #include <dt-bindings/clock/qcom,dispcc-sm6350.h> 8 #include <dt-bindings/clock/qcom,gcc-sm6350.h> 9 #include <dt-bindings/clock/qcom,gpucc-sm6350.h> 10 #include <dt-bindings/clock/qcom,rpmh.h> 11 #include <dt-bindings/clock/qcom,sm6350-camcc.h> 12 #include <dt-bindings/dma/qcom-gpi.h> 13 #include <dt-bindings/gpio/gpio.h> 14 #include <dt-bindings/interconnect/qcom,icc.h> 15 #include <dt-bindings/interconnect/qcom,osm-l3.h> [all …]
|
H A D | sm8450.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/clock/qcom,gcc-sm8450.h> 8 #include <dt-bindings/clock/qcom,rpmh.h> 9 #include <dt-bindings/clock/qcom,sm8450-camcc.h> 10 #include <dt-bindings/clock/qcom,sm8450-dispcc.h> 11 #include <dt-bindings/clock/qcom,sm8450-gpucc.h> 12 #include <dt-bindings/clock/qcom,sm8450-videocc.h> 13 #include <dt-bindings/dma/qcom-gpi.h> 14 #include <dt-bindings/firmware/qcom,scm.h> [all …]
|
H A D | sm8250.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/clock/qcom,dispcc-sm8250.h> 8 #include <dt-bindings/clock/qcom,gcc-sm8250.h> 9 #include <dt-bindings/clock/qcom,gpucc-sm8250.h> 10 #include <dt-bindings/clock/qcom,rpmh.h> 11 #include <dt-bindings/dma/qcom-gpi.h> 12 #include <dt-bindings/gpio/gpio.h> 13 #include <dt-bindings/interconnect/qcom,osm-l3.h> 14 #include <dt-bindings/interconnect/qcom,sm8250.h> [all …]
|
H A D | sm8150.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 3 * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved. 7 #include <dt-bindings/dma/qcom-gpi.h> 8 #include <dt-bindings/firmware/qcom,scm.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/phy/phy-qcom-qmp.h> 11 #include <dt-bindings/power/qcom-rpmpd.h> 12 #include <dt-bindings/soc/qcom,rpmh-rsc.h> 13 #include <dt-bindings/clock/qcom,rpmh.h> 14 #include <dt-bindings/clock/qcom,dispcc-sm8150.h> [all …]
|
H A D | sm8350.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 6 #include <dt-bindings/interconnect/qcom,sm8350.h> 7 #include <dt-bindings/interrupt-controller/arm-gic.h> 8 #include <dt-bindings/clock/qcom,dispcc-sm8350.h> 9 #include <dt-bindings/clock/qcom,gcc-sm8350.h> 10 #include <dt-bindings/clock/qcom,gpucc-sm8350.h> 11 #include <dt-bindings/clock/qcom,rpmh.h> 12 #include <dt-bindings/dma/qcom-gpi.h> 13 #include <dt-bindings/firmware/qcom,scm.h> 14 #include <dt-bindings/gpio/gpio.h> [all …]
|
/freebsd/sys/contrib/device-tree/src/arm64/marvell/ |
H A D | armada-ap80x.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/thermal/thermal.h> 11 /dts-v1/; 14 #address-cells = <2>; 15 #size-cells = <2>; 25 compatible = "arm,psci-0.2"; 29 reserved-memory { 30 #address-cells = <2>; 31 #size-cells = <2>; [all …]
|
/freebsd/sys/contrib/device-tree/src/arm64/freescale/ |
H A D | fsl-ls1088a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Device Tree Include file for NXP Layerscape-1088A family SoC. 5 * Copyright 2017-2020 NXP 10 #include <dt-bindings/clock/fsl,qoriq-clockgen.h> 11 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #include <dt-bindings/thermal/thermal.h> 16 interrupt-parent = <&gic>; 17 #address-cells = <2>; 18 #size-cells = <2>; 26 #address-cells = <1>; [all …]
|
H A D | fsl-ls1028a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Device Tree Include file for NXP Layerscape-1028A family SoC. 5 * Copyright 2018-2020 NXP 11 #include <dt-bindings/clock/fsl,qoriq-clockgen.h> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include <dt-bindings/thermal/thermal.h> 17 interrupt-parent = <&gic>; 18 #address-cells = <2>; 19 #size-cells = <2>; 22 #address-cells = <1>; [all …]
|
/freebsd/sys/contrib/device-tree/src/arm/qcom/ |
H A D | qcom-sdx55.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 9 #include <dt-bindings/clock/qcom,gcc-sdx55.h> 10 #include <dt-bindings/clock/qcom,rpmh.h> 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/interconnect/qcom,sdx55.h> 13 #include <dt-bindings/interrupt-controller/arm-gic.h> 14 #include <dt-bindings/power/qcom-rpmpd.h> 15 #include <dt-bindings/soc/qcom,rpmh-rsc.h> 18 #address-cells = <1>; 19 #size-cells = <1>; [all …]
|
H A D | qcom-sdx65.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 9 #include <dt-bindings/clock/qcom,gcc-sdx65.h> 10 #include <dt-bindings/clock/qcom,rpmh.h> 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include <dt-bindings/power/qcom-rpmpd.h> 14 #include <dt-bindings/soc/qcom,rpmh-rsc.h> 15 #include <dt-bindings/interconnect/qcom,sdx65.h> 18 #address-cells = <1>; 19 #size-cells = <1>; [all …]
|
/freebsd/sys/contrib/device-tree/src/arm64/hisilicon/ |
H A D | hip07.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 compatible = "hisilicon,hip07-d05"; 12 interrupt-parent = <&gic>; 13 #address-cells = <2>; 14 #size-cells = <2>; 17 compatible = "arm,psci-0.2"; 22 #address-cells = <1>; 23 #size-cells = <0>; 25 cpu-map { [all …]
|