Searched +full:sm4450 +full:- +full:dispcc (Results 1 – 4 of 4) sorted by relevance
/linux/Documentation/devicetree/bindings/clock/ |
H A D | qcom,sm4450-dispcc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,sm4450-dispcc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm Display Clock & Reset Controller on SM4450 10 - Ajit Pandey <quic_ajipan@quicinc.com> 11 - Taniya Das <quic_tdas@quicinc.com> 15 domains on SM4450 17 See also:: include/dt-bindings/clock/qcom,sm4450-dispcc.h 21 const: qcom,sm4450-dispcc [all …]
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/linux/drivers/clk/qcom/ |
H A D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0 2 obj-$(CONFIG_COMMON_CLK_QCOM) += clk-qcom.o 4 clk-qcom-y += common.o 5 clk-qcom-y += clk-regmap.o 6 clk-qcom-y += clk-alpha-pll.o 7 clk-qcom-y += clk-pll.o 8 clk-qcom-y += clk-rcg.o 9 clk-qcom-y += clk-rcg2.o 10 clk-qcom-y += clk-branch.o 11 clk-qcom-y += clk-regmap-divider.o [all …]
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H A D | dispcc-sm4450.c | 1 // SPDX-License-Identifier: GPL-2.0-only 6 #include <linux/clk-provider.h> 13 #include <dt-bindings/clock/qcom,sm4450-dispcc.h> 15 #include "clk-alpha-pll.h" 16 #include "clk-branch.h" 17 #include "clk-pll.h" 18 #include "clk-rcg.h" 19 #include "clk-regmap.h" 20 #include "clk-regmap-divider.h" 736 { .compatible = "qcom,sm4450-dispcc" }, [all …]
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/linux/arch/arm64/boot/dts/qcom/ |
H A D | sm4450.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 6 #include <dt-bindings/clock/qcom,rpmh.h> 7 #include <dt-bindings/clock/qcom,sm4450-camcc.h> 8 #include <dt-bindings/clock/qcom,sm4450-dispcc.h> 9 #include <dt-bindings/clock/qcom,sm4450-gcc.h> 10 #include <dt-bindings/clock/qcom,sm4450-gpucc.h> 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include <dt-bindings/soc/qcom,rpmh-rsc.h> 16 interrupt-parent = <&intc>; [all …]
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