Searched +full:sdx55 +full:- +full:a7pll (Results 1 – 2 of 2) sorted by relevance
| /linux/Documentation/devicetree/bindings/clock/ |
| H A D | qcom,a7pll.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,a7pll.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
13 The A7 PLL on the Qualcomm platforms like SDX55, SDX65 is used to provide high
19 - qcom,sdx55-a7pll
24 '#clock-cells':
29 - description: board XO clock
31 clock-names:
[all …]
|
| /linux/drivers/clk/qcom/ |
| H A D | a7-pll.c | 1 // SPDX-License-Identifier: GPL-2.0
9 #include <linux/clk-provider.h>
14 #include "clk-alpha-pll.h"
22 static struct clk_alpha_pll a7pll = { variable
29 .name = "a7pll",
58 struct device *dev = &pdev->dev; in qcom_a7pll_probe()
73 regmap_read(regmap, a7pll.offset + LUCID_PLL_OFF_L_VAL, &l_val); in qcom_a7pll_probe()
75 clk_lucid_pll_configure(&a7pll, regmap, &a7pll_config); in qcom_a7pll_probe()
77 ret = devm_clk_register_regmap(dev, &a7pll.clkr); in qcom_a7pll_probe()
82 &a7pll.clkr.hw); in qcom_a7pll_probe()
[all …]
|