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/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMicroMipsInstrFPU.td287 let BaseOpcode = "SDC164";
302 let BaseOpcode = "SDC164";
H A DMipsInstrFPU.td610 def SDC164 : StdMMR6Rel, SW_FT<"sdc1", FGR64Opnd, mem_simm16, II_SDC1, store>,
845 <"s.d $fd, $addr", (SDC164 FGR64Opnd:$fd, mem_simm16:$addr), 0>,
1008 def : StoreRegImmPat<SDC164, f64>, ISA_MIPS1, FGR_64;
H A DMipsSEInstrInfo.cpp69 (Opc == Mips::SWC1) || (Opc == Mips::SDC1) || (Opc == Mips::SDC164)) { in isStoreToStackSlot()
241 Opc = Mips::SDC164; in storeRegToStack()
H A DMipsScheduleI6400.td62 def : InstRW<[I6400WriteLSUStore], (instrs SB, SD, SH, SW, SDC1, SDC164, SWC1, SWC2_R6,
H A DMipsInstructionSelector.cpp232 return isStore ? Mips::SDC164 : Mips::LDC164; in selectLoadStoreOpCode()
H A DMipsScheduleP5600.td579 def : InstRW<[P5600WriteStoreFPUS], (instrs SDC1, SDC164, SDXC1, SDXC164,
H A DMipsScheduleGeneric.td876 def : InstRW<[GenericWriteFPUStore], (instrs SDC1, SDC164, SDXC1, SDXC164,