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/linux/arch/loongarch/kernel/
H A Dlbt.S27 movscr2gr t1, $scr0 # save scr
47 movgr2scr $scr0, t1
65 movgr2scr $scr0, zero
79 movscr2gr t1, $scr0 # save scr
101 movgr2scr $scr0, t1
H A Dptrace.c349 r = membuf_write(&to, &target->thread.lbt.scr0, sizeof(target->thread.lbt.scr0)); in lbt_get()
365 const int eflags_start = 4 * sizeof(target->thread.lbt.scr0); in lbt_set()
369 &target->thread.lbt.scr0, in lbt_set()
370 0, 4 * sizeof(target->thread.lbt.scr0)); in lbt_set()
H A Dasm-offsets.c178 OFFSET(THREAD_SCR0, loongarch_lbt, scr0); in output_thread_lbt_defines()
H A Dprocess.c141 memcpy(dst, src, offsetof(struct task_struct, thread.lbt.scr0)); in arch_dup_task_struct()
H A Dsignal.c218 err |= __put_user(current->thread.lbt.scr0, &regs[0]); in copy_lbt_to_sigcontext()
233 err |= __get_user(current->thread.lbt.scr0, &regs[0]); in copy_lbt_from_sigcontext()
/linux/sound/soc/mxs/
H A Dmxs-saif.c349 u32 scr0; in mxs_saif_set_dai_fmt()
368 scr0 = __raw_readl(saif->base + SAIF_CTRL); in mxs_saif_set_dai_fmt()
369 scr0 = scr0 & ~BM_SAIF_CTRL_BITCLK_EDGE & ~BM_SAIF_CTRL_LRCLK_POLARITY \ in mxs_saif_set_dai_fmt()
424 __raw_writel(scr | scr0, saif->base + SAIF_CTRL); in mxs_saif_hw_params()
292 u32 scr0; mxs_saif_set_dai_fmt() local
/linux/arch/loongarch/
H A DKconfig297 def_bool $(as-instr,movscr2gr \$a0$(comma)\$scr0)
612 Loongson Binary Translation (LBT) introduces 4 scratch registers (SCR0
/linux/arch/loongarch/include/asm/
H A Dprocessor.h91 unsigned long scr0; member
/linux/arch/x86/kernel/
H A Dprocess_32.c84 printk("%sCR0: %08lx CR2: %08lx CR3: %08lx CR4: %08lx\n", in __show_regs()
/linux/drivers/scsi/sym53c8xx_2/
H A Dsym_fw2.h304 SCR_LOAD_REL (scr0, 4),
653 SCR_STORE_REL (scr0, 4),
663 SCR_LOAD_REL (scr0, 4), /* DUMMY READ */
791 SCR_STORE_REL (scr0, 4),
1002 SCR_LOAD_REL (scr0, 4),
H A Dsym_fw1.h343 RADDR_1 (scr0),
665 RADDR_1 (scr0),
688 RADDR_1 (scr0),
816 RADDR_1 (scr0),
1111 RADDR_1 (scr0),
H A Dsym_hipd.h578 * scratchb register (declared as scr0..scr3) just after the
586 #define HX_REG scr0
/linux/arch/loongarch/kvm/
H A Dvcpu.c793 *v = vcpu->arch.lbt.scr0; in kvm_get_one_reg()
883 vcpu->arch.lbt.scr0 = v; in kvm_set_one_reg()
/linux/drivers/scsi/aacraid/
H A Dsrc.c126 u32 events = src_readl(dev, MUnit.SCR0); in aac_src_intr_message()
H A Daacraid.h1180 __le32 SCR0; /* b0h | Scratchpad 0 */ member
/linux/tools/testing/selftests/kvm/lib/x86/
H A Dprocessor.c135 fprintf(stream, "%*scr0: 0x%.16llx cr2: 0x%.16llx " in sregs_dump()
/linux/drivers/clk/sunxi-ng/
H A Dccu-sun50i-h6.c463 static SUNXI_CCU_GATE(bus_scr0_clk, "bus-scr0", "apb2", 0x93c, BIT(0), 0);
H A Dccu-sun8i-h3.c312 static SUNXI_CCU_GATE(bus_scr0_clk, "bus-scr0", "apb2",
/linux/drivers/scsi/
H A Dncr53c8xx.c1403 ** (declared as scr0..scr3 in ncr_reg.h) just after the select/reselect,
1419 #define QU_REG scr0
2129 RADDR (scr0),
2372 RADDR (scr0),
2840 RADDR (scr0),
/linux/drivers/iommu/arm/arm-smmu/
H A Darm-smmu.c993 * should be called after sCR0 is written.