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/linux/Documentation/devicetree/bindings/pci/
H A Dqcom,pcie-sc8280xp.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/qcom,pcie-sc8280xp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm SC8280XP PCI Express Root Complex
10 - Bjorn Andersson <andersson@kernel.org>
11 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
14 Qualcomm SC8280XP SoC PCIe root complex controller is based on the Synopsys
20 - qcom,pcie-sa8540p
21 - qcom,pcie-sc8280xp
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/linux/sound/soc/qcom/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
7 in Qualcomm Technologies SOC-based platforms.
57 Qualcomm Technologies IPQ806X-based Storm board.
65 APQ8016 SOC-based systems.
132 based platform sound cards. This will enable the
167 APQ8096 SoC-based systems.
182 SDM845 SoC-based systems.
195 SM8250 SoC-based systems.
199 tristate "SoC Machine driver for SC8280XP boards"
207 SC8280XP SoC-based systems.
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/linux/Documentation/devicetree/bindings/usb/
H A Dqcom,snps-dwc3.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/usb/qcom,snps-dwc3.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Wesley Cheng <quic_wcheng@quicinc.com>
13 Describes the Qualcomm USB block, based on Synopsys DWC3.
19 const: qcom,snps-dwc3
21 - compatible
26 - enum:
27 - qcom,ipq4019-dwc3
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H A Dqcom,dwc3.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Wesley Cheng <quic_wcheng@quicinc.com>
12 # Use the combined qcom,snps-dwc3 instead
21 - compatible
26 - enum:
27 - qcom,ipq4019-dwc3
28 - qcom,ipq5018-dwc3
29 - qcom,ipq5332-dwc3
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/linux/drivers/clk/qcom/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
158 tristate "RPM based Clock Controller"
170 tristate "RPM over SMD based Clock Controller"
213 clock that feeds the CPUs on ipq based devices.
214 Say Y if you want to support CPU frequency scaling on ipq based
223 Say Y if you want to support CPU frequency scaling on ipq based
236 ipq based devices.
245 based devices.
634 tristate "SC8280XP Camera Clock Controller"
639 SC8280XP devices.
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H A Dclk-rpmh.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2018-2021, The Linux Foundation. All rights reserved.
6 #include <linux/clk-provider.h>
13 #include <soc/qcom/cmd-db.h>
17 #include <dt-bindings/clock/qcom,rpmh.h>
23 * struct bcm_db - Auxiliary data pertaining to each Bus Clock Manager(BCM)
37 * struct clk_rpmh - individual rpmh clock data structure
38 * @hw: handle between common and hardware-specific interfaces
142 return (c->last_sent_aggr_state & BIT(state)) in has_state_changed()
143 != (c->aggr_state & BIT(state)); in has_state_changed()
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/linux/drivers/usb/typec/ucsi/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
4 tristate "USB Type-C Connector System Software Interface driver"
9 USB Type-C Connector System Software Interface (UCSI) is a
11 control the USB Type-C ports. On UCSI system the USB Type-C ports
14 is required. UCSI is available on most of the new Intel based systems
15 that are equipped with Embedded Controller and USB Type-C ports.
23 https://www.intel.com/content/www/us/en/io/universal-serial-bus/usb-type-c-ucsi-spec.html
35 Cypress CCGx Type-C controller over I2C interface.
45 interface as ACPI device. On new Intel Atom based platforms starting
57 Type-C controller over I2C interface.
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/linux/Documentation/devicetree/bindings/net/
H A Dqcom,ethqos.yaml1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <andersson@kernel.org>
11 - Konrad Dybcio <konradybcio@kernel.org>
14 dwmmac based Qualcomm ethernet devices which support Gigabit
18 - $ref: snps,dwmac.yaml#
23 - items:
24 - enum:
25 - qcom,qcs615-ethqos
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/linux/drivers/iommu/arm/arm-smmu/
H A Darm-smmu-qcom.c1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <linux/adreno-smmu-priv.h>
14 #include "arm-smmu.h"
15 #include "arm-smmu-qcom.h"
17 #define QCOM_DUMMY_VAL -1
20 * SMMU-500 TRM defines BIT(0) as CMTLB (Enable context caching in the
38 { .compatible = "qcom,adreno-gmu",
40 { .compatible = "qcom,adreno-smmu",
44 { .compatible = "qcom,sc7280-mdss",
46 { .compatible = "qcom,sc7280-venus",
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/linux/drivers/gpu/drm/msm/
H A Dmsm_mdss.c2 * SPDX-License-Identifier: GPL-2.0
56 path0 = devm_of_icc_get(dev, "mdp0-mem"); in msm_mdss_parse_data_bus_icc_path()
60 msm_mdss->mdp_path[0] = path0; in msm_mdss_parse_data_bus_icc_path()
61 msm_mdss->num_mdp_paths = 1; in msm_mdss_parse_data_bus_icc_path()
63 path1 = devm_of_icc_get(dev, "mdp1-mem"); in msm_mdss_parse_data_bus_icc_path()
65 msm_mdss->mdp_path[1] = path1; in msm_mdss_parse_data_bus_icc_path()
66 msm_mdss->num_mdp_paths++; in msm_mdss_parse_data_bus_icc_path()
69 reg_bus_path = of_icc_get(dev, "cpu-cfg"); in msm_mdss_parse_data_bus_icc_path()
71 msm_mdss->reg_bus_path = reg_bus_path; in msm_mdss_parse_data_bus_icc_path()
84 interrupts = readl_relaxed(msm_mdss->mmio + REG_MDSS_HW_INTR_STATUS); in msm_mdss_irq()
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/linux/drivers/gpu/drm/msm/dp/
H A Ddp_display.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2017-2020, The Linux Foundation. All rights reserved.
190 { .compatible = "qcom,sa8775p-dp", .data = &msm_dp_desc_sa8775p },
191 { .compatible = "qcom,sc7180-dp", .data = &msm_dp_desc_sc7180 },
192 { .compatible = "qcom,sc7280-dp", .data = &msm_dp_desc_sc7280 },
193 { .compatible = "qcom,sc7280-edp", .data = &msm_dp_desc_sc7280 },
194 { .compatible = "qcom,sc8180x-dp", .data = &msm_dp_desc_sc8180x },
195 { .compatible = "qcom,sc8180x-edp", .data = &msm_dp_desc_sc8180x },
196 { .compatible = "qcom,sc8280xp-dp", .data = &msm_dp_desc_sc8280xp },
197 { .compatible = "qcom,sc8280xp-edp", .data = &msm_dp_desc_sc8280xp },
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/linux/sound/soc/codecs/
H A Dlpass-wsa-macro.c1 // SPDX-License-Identifier: GPL-2.0-only
2 // Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
12 #include <linux/clk-provider.h>
14 #include <sound/soc-dapm.h>
19 #include "lpass-macro-common.h"
20 #include "lpass-wsa-macro.h"
356 {24000, -EINVAL},/* 24K */
381 * struct wsa_reg_layout - Register layout differences
386 * @compander1_reg_offset: offset between compander registers (compander1 - compander0)
388 * @softclip1_reg_offset: offset between compander registers (softclip1 - softclip0)
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/linux/drivers/phy/qualcomm/
H A Dphy-qcom-qmp-combo.c1 // SPDX-License-Identifier: GPL-2.0
7 #include <linux/clk-provider.h>
25 #include <drm/bridge/aux-bridge.h>
27 #include <dt-bindings/phy/phy-qcom-qmp.h>
29 #include "phy-qcom-qmp-common.h"
31 #include "phy-qcom-qmp.h"
32 #include "phy-qcom-qmp-pcs-misc-v3.h"
33 #include "phy-qcom-qmp-pcs-usb-v4.h"
34 #include "phy-qcom-qmp-pcs-usb-v5.h"
35 #include "phy-qcom-qmp-pcs-usb-v6.h"
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