Searched full:saclk (Results 1 – 5 of 5) sorted by relevance
20 #define SACLK 96000000U macro118 /* setup PLL (this assumes SACLK = 96MHz) */ in tda10086_init()157 tda10086_write_byte(state, 0x34, (((1<<19) * (22000/1000)) / (SACLK/1000))); in tda10086_init()158 tda10086_write_byte(state, 0x35, (((1<<19) * (22000/1000)) / (SACLK/1000)) >> 8); in tda10086_init()300 if (symbol_rate < SACLK / 10000 * 137) { in tda10086_set_symbol_rate()303 } else if (symbol_rate < SACLK / 10000 * 208) { in tda10086_set_symbol_rate()306 } else if (symbol_rate < SACLK / 10000 * 270) { in tda10086_set_symbol_rate()309 } else if (symbol_rate < SACLK / 10000 * 416) { in tda10086_set_symbol_rate()312 } else if (symbol_rate < SACLK / 10000 * 550) { in tda10086_set_symbol_rate()315 } else if (symbol_rate < SACLK / 10000 * 833) { in tda10086_set_symbol_rate()[all …]
219 /* symbol_rate_min: SACLK/64 == (XIN/2)/64 */221 .symbol_rate_max = (57840000 / 2) / 4, /* SACLK/4 */
388 …state->frontend.ops.info.symbol_rate_min = (state->config->xin / 2) / 64; /* SACLK/64 == (XIN… in ves1820_attach()389 state->frontend.ops.info.symbol_rate_max = (state->config->xin / 2) / 4; /* SACLK/4 */ in ves1820_attach()
491 .symbol_rate_min = (XIN / 2) / 64, /* SACLK/64 == (XIN/2)/64 */492 .symbol_rate_max = (XIN / 2) / 4, /* SACLK/4 */
124 /* symbol_rate_min: SACLK/64 == (XIN/2)/64 */126 .symbol_rate_max = (57840000 / 2) / 4, /* SACLK/4 */