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Searched full:rx1_a (Results 1 – 12 of 12) sorted by relevance

/linux/drivers/pinctrl/renesas/
H A Dpfc-r8a77995.c145 #define GPSR4_23 F_(RX1_A, IP12_3_0)
312 #define IP12_3_0 FM(RX1_A) FM(CTS0_N) FM(TPU0TO0_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0…
901 PINMUX_IPSR_MSEL(IP12_3_0, RX1_A, SEL_SCIF1_0),
2999 [ 8] = RCAR_GP_PIN(4, 23), /* RX1_A */
H A Dpfc-sh7734.c884 PINMUX_IPSR_MSEL(IP4_11_9, RX1_A, SEL_SCIF1_0),
1467 GPIO_FN(HRX0_A), GPIO_FN(RX1_A), GPIO_FN(VI0_DATA0_VI0_B0),
H A Dpfc-r8a77970.c194 #define IP3_31_28 FM(VI0_DATA4) FM(HRTS1_N) FM(RX1_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0,…
525 PINMUX_IPSR_MSEL(IP3_31_28, RX1_A, SEL_SCIF1_0),
H A Dpfc-r8a7778.c1089 PINMUX_IPSR_MSEL(IP8_15_14, RX1_A, SEL_SCIF1_A),
1483 SCIF_PFC_DAT(scif1_data_a, TX1_A, RX1_A);
H A Dpfc-r8a77965.c210 #define GPSR5_5 F_(RX1_A, IP12_15_12)
362 #define IP12_15_12 FM(RX1_A) FM(HRX1_A) F_(0, 0) F_(0, 0) F_(0, 0) FM(TS_SDAT0_C) FM(STP_ISD_0_…
1224 PINMUX_IPSR_MSEL(IP12_15_12, RX1_A, SEL_SCIF1_0),
6240 [17] = RCAR_GP_PIN(5, 5), /* RX1_A */
H A Dpfc-r8a77951.c205 #define GPSR5_5 F_(RX1_A, IP12_15_12)
357 #define IP12_15_12 FM(RX1_A) FM(HRX1_A) F_(0, 0) F_(0, 0) F_(0, 0) FM(TS_SDAT0_C) FM(STP_ISD_0_…
1214 PINMUX_IPSR_MSEL(IP12_15_12, RX1_A, SEL_SCIF1_0),
6047 [17] = RCAR_GP_PIN(5, 5), /* RX1_A */
H A Dpfc-r8a7796.c210 #define GPSR5_5 F_(RX1_A, IP12_15_12)
362 #define IP12_15_12 FM(RX1_A) FM(HRX1_A) F_(0, 0) F_(0, 0) F_(0, 0) FM(TS_SDAT0_C) FM(STP_ISD_0_…
1221 PINMUX_IPSR_MSEL(IP12_15_12, RX1_A, SEL_SCIF1_0),
5999 [17] = RCAR_GP_PIN(5, 5), /* RX1_A */
H A Dpfc-r8a77980.c228 #define IP3_31_28 FM(VI0_DATA4) FM(HRTS1_N) FM(RX1_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0,…
607 PINMUX_IPSR_MSEL(IP3_31_28, RX1_A, SEL_SCIF1_0),
H A Dpfc-r8a779h0.c281 #define IP1SR0_31_28 FM(MSIOF2_SYNC) FM(HRX1_A) FM(RX1_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(…
709 PINMUX_IPSR_GPSR(IP1SR0_31_28, RX1_A),
2269 /* RX1_A, TX1_A */
H A Dpfc-r8a779g0.c295 #define IP1SR0_31_28 FM(MSIOF2_SYNC) FM(HRX1_A) FM(RX1_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_…
762 PINMUX_IPSR_GPSR(IP1SR0_31_28, RX1_A),
2310 /* RX1_A, TX1_A */
H A Dpfc-r8a779a0.c380 #define IP2SR1_23_20 FM(MSIOF2_SYNC) FM(HRX1) FM(RX1_A) F_(0, 0) FM(DU_DB5) FM(A21) F_(0, 0) F_(0,…
894 PINMUX_IPSR_GPSR(IP2SR1_23_20, RX1_A),
H A Dpfc-r8a77470.c954 PINMUX_IPSR_MSEL(IP12_23_20, RX1_A, SEL_SCIF1_0),