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/linux/Documentation/ABI/testing/
H A Dsysfs-class-rtc-rtc0-device-rtc_calibration1 What: /sys/class/rtc/rtc0/device/rtc_calibration
/linux/Documentation/devicetree/bindings/rtc/
H A Dcdns,rtc.txt16 rtc0: rtc@fd080000 {
/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6qdl-mba6a.dtsi38 rtc0: rtc@68 { label
H A Dimx6qdl-mba6b.dtsi48 rtc0: rtc@68 { label
H A Dimx6q-apalis-eval.dtsi17 rtc0 = &rtc_i2c;
H A Dimx6dl-colibri-iris.dts24 rtc0 = &rtc_i2c;
H A Dimx6q-apalis-ixora.dts25 rtc0 = &rtc_i2c;
H A Dimx6dl-colibri-eval-v3.dts26 rtc0 = &rtc_i2c;
H A Dimx6q-apalis-ixora-v1.2.dts25 rtc0 = &rtc_i2c;
/linux/arch/mips/boot/dts/loongson/
H A Drs780e-pch.dtsi30 rtc0: rtc@70 { label
H A Dloongson64v_4core_virtio.dts61 rtc0: rtc@10081000 { label
/linux/Documentation/admin-guide/
H A Drtc.rst22 * /dev/rtc0, /dev/rtc1 ... are part of a framework that's
124 rtc0 is used by default. More information is (currently) shown
/linux/arch/arm64/boot/dts/freescale/
H A Dimx8x-colibri-eval-v3.dtsi10 rtc0 = &rtc_i2c;
H A Dimx8x-colibri-iris.dtsi8 rtc0 = &rtc_i2c;
/linux/arch/loongarch/boot/dts/
H A Dloongson-2k2000-ref.dts60 &rtc0 {
/linux/arch/arm/boot/dts/rockchip/
H A Drv1109-relfor-saib.dts91 clocks = <&rtc0>;
239 rtc0: rtc@52 { label
/linux/arch/arm64/boot/dts/xilinx/
H A Dzynqmp-zc1751-xm018-dc4.dts26 rtc0 = &rtc;
/linux/samples/pfsm/
H A Dpfsm-wakeup.c22 #define RTC_A "/dev/rtc0"
/linux/tools/testing/selftests/timers/
H A Drtcpie.c28 static const char default_rtc[] = "/dev/rtc0";
/linux/drivers/soc/ti/
H A Dpm33xx.c448 omap_rtc = rtc_class_open("rtc0"); in am33xx_pm_rtc_setup()
450 pr_warn("PM: rtc0 not available\n"); in am33xx_pm_rtc_setup()
/linux/arch/arm/boot/dts/nvidia/
H A Dtegra20-colibri-iris.dts13 rtc0 = "/i2c@7000c000/rtc@68";
H A Dtegra30-colibri-eval-v3.dts13 rtc0 = "/i2c@7000c000/rtc@68";
H A Dtegra20-colibri-eval-v3.dts13 rtc0 = "/i2c@7000c000/rtc@68";
/linux/arch/sh/kernel/cpu/sh2a/
H A Dclock-sh7264.c130 CLKDEV_CON_ID("rtc0", &mstp_clks[MSTP30]),
H A Dclock-sh7269.c162 CLKDEV_CON_ID("rtc0", &mstp_clks[MSTP30]),

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