Searched +full:rk3568 +full:- +full:naneng +full:- +full:combphy (Results 1 – 4 of 4) sorted by relevance
| /freebsd/sys/contrib/device-tree/Bindings/phy/ |
| H A D | phy-rockchip-naneng-combphy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/phy-rockchip-naneng-combphy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip SoC Naneng Combo Phy
10 - Heiko Stuebner <heiko@sntech.de>
15 - rockchip,rk3568-naneng-combphy
16 - rockchip,rk3588-naneng-combphy
23 - description: reference clock
24 - description: apb clock
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| /freebsd/sys/contrib/device-tree/src/arm64/rockchip/ |
| H A D | rk3568.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9 compatible = "rockchip,rk3568";
12 compatible = "rockchip,rk3568-dwc-ahci", "snps,dwc-ahci";
16 clock-names = "sata", "pmalive", "rxoob";
19 phy-names = "sata-phy";
20 ports-implemented = <0x1>;
21 power-domains = <&power RK3568_PD_PIPE>;
26 compatible = "rockchip,rk3568-pipe-phy-grf", "syscon";
31 compatible = "rockchip,rk3568-qos", "syscon";
36 compatible = "rockchip,rk3568-qos", "syscon";
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| H A D | rk356x.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/rk3568-cru.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-binding
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| /freebsd/sys/arm64/rockchip/ |
| H A D | rk3568_combphy.c | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
49 #include <contrib/device-tree/include/dt-bindings/phy/phy.h>
57 {"rockchip,rk3568-naneng-combphy", 1},
174 switch (sc->mode) { in rk3568_combphy_enable()
179 bus_write_4(sc->mem, PHYREG7, in rk3568_combphy_enable()
183 bus_write_4(sc->mem, PHYREG15, in rk3568_combphy_enable()
184 bus_read_4(sc->mem, PHYREG15) | PHYREG15_CTLE_EN); in rk3568_combphy_enable()
187 SYSCON_WRITE_4(sc->pipe_phy_grf, PIPE_PHY_GRF_PIPE_CON3, in rk3568_combphy_enable()
190 SYSCON_WRITE_4(sc->pipe_phy_grf, PIPE_PHY_GRF_PIPE_CON2, in rk3568_combphy_enable()
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