Searched +full:rk3399 +full:- +full:typec +full:- +full:phy (Results 1 – 17 of 17) sorted by relevance
| /freebsd/sys/contrib/device-tree/Bindings/phy/ |
| H A D | rockchip,rk3399-typec-phy.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/phy/rockchip,rk3399-typec-phy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Rockchip Type-C PHY 10 - Heiko Stuebner <heiko@sntech.de> 14 const: rockchip,rk3399-typec-phy 22 clock-names: 24 - const: tcpdcore 25 - const: tcpdphy-ref [all …]
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| H A D | phy-rockchip-typec.txt | 1 * ROCKCHIP type-c PHY 2 --------------------- 5 - compatible : must be "rockchip,rk3399-typec-phy" 6 - reg: Address and length of the usb phy control register set 7 - rockchip,grf : phandle to the syscon managing the "general 9 - clocks : phandle + clock specifier for the phy clocks 10 - clock-names : string, clock name, must be "tcpdcore", "tcpdphy-ref"; 11 - assigned-clocks: main clock, should be <&cru SCLK_UPHY0_TCPDCORE> or 13 - assigned-clock-rates : the phy core clk frequency, shall be: 50000000 14 - resets : a list of phandle + reset specifier pairs [all …]
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| /freebsd/sys/contrib/device-tree/Bindings/usb/ |
| H A D | rockchip,dwc3.txt | 4 - compatible: should contain "rockchip,rk3399-dwc3" for rk3399 SoC 5 - clocks: A list of phandle + clock-specifier pairs for the 6 clocks listed in clock-names 7 - clock-names: Should contain the following: 18 Phy documentation is provided in the following places: 19 Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml - USB2.0 PHY 20 Documentation/devicetree/bindings/phy/phy-rockchip-typec.txt - Type-C PHY 25 compatible = "rockchip,rk3399-dwc3"; 28 clock-names = "ref_clk", "suspend_clk", 30 #address-cells = <2>; [all …]
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| H A D | rockchip,dwc3.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Heiko Stuebner <heiko@sntech.de> 15 Phy documentation is provided in the following places. 17 USB2.0 PHY 18 Documentation/devicetree/bindings/phy/rockchip,inno-usb2phy.yaml 20 Type-C PHY 21 Documentation/devicetree/bindings/phy/rockchip,rk3399-typec-phy.yaml 28 - rockchip,rk3328-dwc3 [all …]
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| /freebsd/sys/arm64/rockchip/ |
| H A D | rk_typec_phy.c | 1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 29 * Rockchip PHY TYPEC 47 #include <dev/phy/phy_usb.h> 112 { "rockchip,rk3399-typec-phy", 1 }, 118 { -1, 0 } 134 #define RK_TYPEC_PHY_READ(sc, reg) bus_read_4(sc->res, (reg)) 135 #define RK_TYPEC_PHY_WRITE(sc, reg, val) bus_write_4(sc->res, (reg), (val)) 137 /* Phy class and methods. */ 139 static int rk_typec_phy_get_mode(struct phynode *phy, int *mode); [all …]
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| H A D | rk_pcie_phy.c | 1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 29 * Rockchip PHY TYPEC 48 #include <dev/phy/phy.h> 49 #include <dev/phy/phy_internal.h> 61 /* PHY config registers - write */ 67 /* PHY config registers - read */ 76 {"rockchip,rk3399-pcie-phy", 1}, 89 #define PHY_LOCK(_sc) mtx_lock(&(_sc)->mtx) 90 #define PHY_UNLOCK(_sc) mtx_unlock(&(_sc)->mtx) [all …]
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| /freebsd/sys/contrib/device-tree/src/arm64/rockchip/ |
| H A D | rk3399-roc-pc.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Copyright (c) 2017 T-Chip Intelligent Technology Co., Ltd 6 /dts-v1/; 7 #include <dt-bindings/input/linux-event-codes.h> 8 #include <dt-bindings/pwm/pwm.h> 9 #include "rk3399.dtsi" 12 model = "Firefly ROC-RK3399-PC Board"; 13 compatible = "firefly,roc-rk3399-pc", "rockchip,rk3399"; 22 stdout-path = "serial2:1500000n8"; 26 compatible = "pwm-backlight"; [all …]
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| H A D | rk3399-rock-pi-4.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 /dts-v1/; 8 #include <dt-bindings/input/linux-event-codes.h> 9 #include <dt-bindings/pwm/pwm.h> 10 #include "rk3399.dtsi" 11 #include "rk3399-opp.dtsi" 15 compatible = "radxa,rockpi4", "rockchip,rk3399"; 18 stdout-path = "serial2:1500000n8"; 21 clkin_gmac: external-gmac-clock { 22 compatible = "fixed-clock"; [all …]
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| H A D | rk3399-orangepi.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 8 #include "dt-bindings/pwm/pwm.h" 9 #include "dt-bindings/input/input.h" 10 #include <dt-bindings/interrupt-controller/irq.h> 11 #include "dt-bindings/usb/pd.h" 12 #include "rk3399.dtsi" 15 model = "Orange Pi RK3399 Board"; 16 compatible = "xunlong,rk3399-orangepi", "rockchip,rk3399"; 26 stdout-path = "serial2:1500000n8"; [all …]
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| H A D | rk3399-firefly.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 7 #include <dt-bindings/input/linux-event-codes.h> 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/pwm/pwm.h> 10 #include <dt-bindings/usb/pd.h> 11 #include "rk3399.dtsi" 14 model = "Firefly-RK3399 Board"; 15 compatible = "firefly,firefly-rk3399", "rockchip,rk3399"; 25 stdout-path = "serial2:1500000n8"; [all …]
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| H A D | rk3399-hugsun-x99.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2 /dts-v1/; 3 #include <dt-bindings/pwm/pwm.h> 4 #include <dt-bindings/input/input.h> 5 #include <dt-bindings/interrupt-controller/irq.h> 6 #include "rk3399.dtsi" 10 compatible = "hugsun,x99", "rockchip,rk3399"; 20 stdout-path = "serial2:1500000n8"; 23 clkin_gmac: external-gmac-clock { 24 compatible = "fixed-clock"; [all …]
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| H A D | rk3399-rock-4c-plus.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 /dts-v1/; 9 #include <dt-bindings/leds/common.h> 10 #include "rk3399-t.dtsi" 14 compatible = "radxa,rock-4c-plus", "rockchip,rk3399"; 23 stdout-path = "serial2:1500000n8"; 26 clkin_gmac: external-gmac-clock { 27 compatible = "fixed-clock"; 28 clock-frequency = <125000000>; 29 clock-output-names = "clkin_gmac"; [all …]
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| H A D | rk3399-base.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/rk3399-cru.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/pinctrl/rockchip.h> 11 #include <dt-bindings/power/rk3399-power.h> 12 #include <dt-bindings/thermal/thermal.h> 15 compatible = "rockchip,rk3399"; 17 interrupt-parent = <&gic>; [all …]
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| H A D | rk3399-nanopi4.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * RK3399-based FriendlyElec boards device tree source 14 /dts-v1/; 15 #include <dt-bindings/input/linux-event-codes.h> 16 #include "rk3399.dtsi" 27 stdout-path = "serial2:1500000n8"; 30 clkin_gmac: external-gmac-clock { 31 compatible = "fixed-clock"; 32 clock-frequency = <125000000>; 33 clock-output-names = "clkin_gmac"; [all …]
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| H A D | rk3399-eaidk-610.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 7 #include <dt-bindings/input/linux-event-codes.h> 8 #include <dt-bindings/pwm/pwm.h> 9 #include <dt-bindings/usb/pd.h> 10 #include "rk3399.dtsi" 13 model = "OPEN AI LAB EAIDK-610"; 14 compatible = "openailab,eaidk-610", "rockchip,rk3399"; 24 compatible = "pwm-backlight"; 26 brightness-levels = < [all …]
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| H A D | rk3399-rockpro64.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include <dt-bindings/input/linux-event-codes.h> 8 #include <dt-bindings/pwm/pwm.h> 9 #include "rk3399.dtsi" 20 stdout-path = "serial2:1500000n8"; 23 clkin_gmac: external-gmac-clock { 24 compatible = "fixed-clock"; 25 clock-frequency = <125000000>; 26 clock-output-names = "clkin_gmac"; 27 #clock-cells = <0>; [all …]
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| H A D | rk3399-pinebook-pro.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 /dts-v1/; 9 #include <dt-bindings/input/gpio-keys.h> 10 #include <dt-bindings/input/linux-event-codes.h> 11 #include <dt-bindings/pwm/pwm.h> 12 #include <dt-bindings/usb/pd.h> 13 #include <dt-bindings/leds/common.h> 14 #include "rk3399.dtsi" 18 compatible = "pine64,pinebook-pro", "rockchip,rk3399"; 19 chassis-type = "laptop"; [all …]
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