/linux/Documentation/devicetree/bindings/power/ |
H A D | rockchip,power-controller.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/power/rockchip,power-controller.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Rockchip Power Domains 10 - Elaine Zhang <zhangqing@rock-chips.com> 11 - Heiko Stuebner <heiko@sntech.de> 14 Rockchip processors include support for multiple power domains 16 application scenarios to save power. 18 Power domains contained within power-controller node are [all …]
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H A D | rockchip-io-domain.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/power/rockchip-io-domain.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Heiko Stuebner <heiko@sntech.de> 29 should have power or not have power 42 to report their voltage. The IO Voltage Domain for any non-specified 48 - rockchip,px30-io-voltage-domain 49 - rockchip,px30-pmu-io-voltage-domain 50 - rockchip,rk3188-io-voltage-domain [all …]
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/linux/arch/arm64/boot/dts/rockchip/ |
H A D | rk3399-base.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/rk3399-cru.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/pinctrl/rockchip.h> 11 #include <dt-bindings/power/rk3399-power.h> 12 #include <dt-bindings/thermal/thermal.h> 15 compatible = "rockchip,rk3399"; 17 interrupt-parent = <&gic>; [all …]
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H A D | rk3399-sapphire-excavator.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 7 #include "rk3399-sapphire.dtsi" 10 model = "Excavator-RK3399 Board"; 11 compatible = "rockchip,rk3399-sapphire-excavator", "rockchip,rk3399"; 17 adc-keys { 18 compatible = "adc-keys"; 19 io-channels = <&saradc 1>; 20 io-channel-names = "buttons"; 21 keyup-threshold-microvolt = <1800000>; [all …]
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H A D | rk3399-gru-scarlet-kd.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Google Gru-Scarlet Rev3+ (SKU-7/Kingdisplay) board device tree source 8 /dts-v1/; 10 #include "rk3399-gru-scarlet.dtsi" 14 compatible = "google,scarlet-rev15-sku7", "google,scarlet-rev15", 15 "google,scarlet-rev14-sku7", "google,scarlet-rev14", 16 "google,scarlet-rev13-sku7", "google,scarlet-rev13", 17 "google,scarlet-rev12-sku7", "google,scarlet-rev12", 18 "google,scarlet-rev11-sku7", "google,scarlet-rev11", 19 "google,scarlet-rev10-sku7", "google,scarlet-rev10", [all …]
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H A D | rk3399-rock960.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 7 #include "rk3399-rock960.dtsi" 11 compatible = "vamrs,rock960", "rockchip,rk3399"; 14 stdout-path = "serial2:1500000n8"; 18 compatible = "gpio-leds"; 19 pinctrl-names = "default"; 20 pinctrl-0 = <&user_led1_pin>, <&user_led2_pin>, 24 user_led1: led-1 { 27 linux,default-trigger = "heartbeat"; [all …]
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H A D | rk3399-ficus.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 9 /dts-v1/; 10 #include "rk3399-rock960.dtsi" 13 model = "96boards RK3399 Ficus"; 14 compatible = "vamrs,ficus", "rockchip,rk3399"; 21 stdout-path = "serial2:1500000n8"; 24 clkin_gmac: external-gmac-clock { 25 compatible = "fixed-clock"; 26 clock-frequency = <125000000>; 27 clock-output-names = "clkin_gmac"; [all …]
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H A D | rk3528.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/pinctrl/rockchip.h> 11 #include <dt-bindings/clock/rockchip,rk3528-cru.h> 12 #include <dt-bindings/reset/rockchip,rk3528-cru.h> 17 interrupt-parent = <&gic>; 18 #address-cells = <2>; 19 #size-cells = <2>; [all …]
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H A D | rk3399-gru-bob.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Google Gru-Bob Rev 4+ board device tree source 8 /dts-v1/; 9 #include "rk3399-gru-chromebook.dtsi" 13 compatible = "google,bob-rev13", "google,bob-rev12", 14 "google,bob-rev11", "google,bob-rev10", 15 "google,bob-rev9", "google,bob-rev8", 16 "google,bob-rev7", "google,bob-rev6", 17 "google,bob-rev5", "google,bob-rev4", 18 "google,bob", "google,gru", "rockchip,rk3399"; [all …]
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H A D | rk3399-evb.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 7 #include <dt-bindings/pwm/pwm.h> 8 #include "rk3399-base.dtsi" 11 model = "Rockchip RK3399 Evaluation Board"; 12 compatible = "rockchip,rk3399-evb", "rockchip,rk3399"; 20 compatible = "pwm-backlight"; 21 brightness-levels = < 54 default-brightness-level = <200>; 58 edp_panel: edp-panel { [all …]
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H A D | rk3562.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/rockchip,rk3562-cru.h> 7 #include <dt-bindings/interrupt-controller/arm-gic.h> 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/phy/phy.h> 10 #include <dt-bindings/power/rockchip,rk3562-power.h> 11 #include <dt-bindings/pinctrl/rockchip.h> 12 #include <dt-bindings/reset/rockchip,rk3562-cru.h> 13 #include <dt-bindings/soc/rockchip,boot-mode.h> 14 #include <dt-bindings/thermal/thermal.h> [all …]
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H A D | rk3399-orangepi.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 8 #include "dt-bindings/pwm/pwm.h" 9 #include "dt-bindings/input/input.h" 10 #include <dt-bindings/interrupt-controller/irq.h> 11 #include "dt-bindings/usb/pd.h" 12 #include "rk3399.dtsi" 15 model = "Orange Pi RK3399 Board"; 16 compatible = "xunlong,rk3399-orangepi", "rockchip,rk3399"; 26 stdout-path = "serial2:1500000n8"; [all …]
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/linux/Documentation/devicetree/bindings/soc/rockchip/ |
H A D | grf.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Heiko Stuebner <heiko@sntech.de> 15 - items: 16 - enum: 17 - rockchip,rk3288-sgrf 18 - rockchip,rk3528-ioc-grf 19 - rockchip,rk3528-vo-grf 20 - rockchip,rk3528-vpu-grf [all …]
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/linux/Documentation/devicetree/bindings/phy/ |
H A D | rockchip-mipi-dphy-rx0.yaml | 1 # SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 --- 4 $id: http://devicetree.org/schemas/phy/rockchip-mipi-dphy-rx0.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Rockchip SoC MIPI RX0 D-PHY 10 - Helen Koike <helen.koike@collabora.com> 11 - Ezequiel Garcia <ezequiel@collabora.com> 14 The Rockchip SoC has a MIPI D-PHY bus with an RX0 entry which connects to 19 const: rockchip,rk3399-mipi-dphy-rx0 23 - description: MIPI D-PHY ref clock [all …]
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H A D | rockchip,rk3399-typec-phy.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/phy/rockchip,rk3399-typec-phy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Rockchip Type-C PHY 10 - Heiko Stuebner <heiko@sntech.de> 14 const: rockchip,rk3399-typec-phy 22 clock-names: 24 - const: tcpdcore 25 - const: tcpdphy-ref [all …]
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H A D | rockchip,inno-usb2phy.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/phy/rockchip,inno-usb2phy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Heiko Stuebner <heiko@sntech.de> 15 - rockchip,px30-usb2phy 16 - rockchip,rk3036-usb2phy 17 - rockchip,rk3128-usb2phy 18 - rockchip,rk3228-usb2phy 19 - rockchip,rk3308-usb2phy [all …]
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/linux/Documentation/devicetree/bindings/usb/ |
H A D | rockchip,rk3399-dwc3.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/usb/rockchip,rk3399-dwc3.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Rockchip RK3399 SuperSpeed DWC3 USB SoC controller 10 - Heiko Stuebner <heiko@sntech.de> 14 const: rockchip,rk3399-dwc3 16 '#address-cells': 19 '#size-cells': 26 - description: [all …]
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/linux/Documentation/devicetree/bindings/display/rockchip/ |
H A D | rockchip,rk3399-cdn-dp.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/rockchip/rockchip,rk3399-cdn-dp.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Rockchip RK3399 specific extensions to the CDN Display Port 10 - Andy Yan <andy.yan@rock-chip.com> 11 - Heiko Stuebner <heiko@sntech.de> 12 - Sandy Huang <hjc@rock-chips.com> 15 - $ref: /schemas/sound/dai-common.yaml# 20 - const: rockchip,rk3399-cdn-dp [all …]
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/linux/Documentation/devicetree/bindings/media/ |
H A D | rockchip-rga.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/media/rockchip-rga.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 15 - Jacob Chen <jacob-chen@iotwrt.com> 16 - Ezequiel Garcia <ezequiel@collabora.com> 21 - const: rockchip,rk3288-rga 22 - const: rockchip,rk3399-rga 23 - items: 24 - enum: [all …]
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H A D | rockchip-isp1.yaml | 1 # SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 --- 4 $id: http://devicetree.org/schemas/media/rockchip-isp1.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Helen Koike <helen.koike@collabora.com> 19 - fsl,imx8mp-isp 20 - rockchip,px30-cif-isp 21 - rockchip,rk3399-cif-isp 30 interrupt-names: 32 - const: isp [all …]
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/linux/Documentation/devicetree/bindings/memory-controllers/ |
H A D | rockchip,rk3399-dmc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/memory-controllers/rockchip,rk3399-dmc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Rockchip rk3399 DMC (Dynamic Memory Controller) device 10 - Brian Norris <briannorris@chromium.org> 15 - rockchip,rk3399-dmc 17 devfreq-events: 26 clock-names: 28 - const: dmc_clk [all …]
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/linux/Documentation/devicetree/bindings/arm/rockchip/ |
H A D | pmu.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Rockchip Power Management Unit (PMU) 10 - Elaine Zhang <zhangqing@rock-chips.com> 11 - Heiko Stuebner <heiko@sntech.de> 14 The PMU is used to turn on and off different power domains of the SoCs. 15 This includes the power to the CPU cores. 22 - rockchip,px30-pmu 23 - rockchip,rk3066-pmu [all …]
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/linux/Documentation/devicetree/bindings/i2c/ |
H A D | i2c-rk3x.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/i2c/i2c-rk3x.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 14 - $ref: /schemas/i2c/i2c-controller.yaml# 17 - Heiko Stuebner <heiko@sntech.de> 23 - const: rockchip,rv1108-i2c 24 - const: rockchip,rk3066-i2c 25 - const: rockchip,rk3188-i2c 26 - const: rockchip,rk3228-i2c [all …]
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/linux/arch/arm/boot/dts/rockchip/ |
H A D | rv1126.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/rockchip,rv1126-cru.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/pinctrl/rockchip.h> 11 #include <dt-bindings/power/rockchip,rv1126-power.h> 12 #include <dt-bindings/soc/rockchip,boot-mode.h> 15 #address-cells = <1>; 16 #size-cells = <1>; [all …]
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/linux/Documentation/devicetree/bindings/media/i2c/ |
H A D | ovti,ov2685.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Shunqian Zheng <zhengsq@rock-chips.com> 21 - description: XVCLK clock 23 clock-names: 25 - const: xvclk 27 dvdd-supply: 28 description: Digital Domain Power Supply 30 avdd-supply: [all …]
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