| /linux/arch/powerpc/platforms/cell/spufs/ |
| H A D | spu_restore.c | 7 * SPU-side context restore sequence outlined in
55 /* Restore, Step 4: in restore_upper_240kb()
73 /* Restore, Step 6(moved): in restore_decr()
92 /* Restore, Step 11: in write_ppu_mb()
106 /* Restore, Step 12: in write_ppuint_mb()
120 /* Restore, Step 13: in restore_fpcr()
121 * Restore the floating-point status and control in restore_fpcr()
134 /* Restore, Step 14: in restore_srr0()
135 * Restore the SPU SRR0 data from the LSCSA. in restore_srr0()
147 /* Restore, Step 15: in restore_event_mask()
[all …]
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| H A D | switch.c | 17 * save, and then later (optionally) restore the context of a
67 * Restore, Step 1: in acquire_spu_lock()
75 /* Restore, Step 76: in release_spu_lock()
100 * Restore, Step 2: in disable_interrupts()
137 * Restore, Step 25. in set_watchdog_timer()
150 * Restore, Step 3: in inhibit_user_access()
161 * Restore, Step 5: in set_switch_pending()
299 * Restore, Step 11. in do_mfc_mssync()
310 * Restore, Step 12. in issue_mfc_tlbie()
311 * Restore, Step 48. in issue_mfc_tlbie()
[all …]
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| H A D | spu_restore_crt0.S | 3 * crt0_r.S: Entry function for SPU-side context restore.
7 * Entry and exit function for SPU-side of the context restore
46 /* SPU Context Restore, Step 5: Restore the remaining 112 GPRs. */
63 /* SPU Context Restore Step 17: Restore the first 16 GPRs. */
83 * indicating that the SPU-side restore code has
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| H A D | spu_utils.h | 59 * Restore, Step 1: in set_event_mask()
71 * Restore, Step 2: in set_tag_mask()
84 * Restore, Step 3: in build_dma_list()
105 * Restore, Step 7: in enqueue_putllc()
123 * Restore, Step 8: in set_tag_update()
132 * Restore, Step 9: in read_tag_status()
141 * Restore, Step 10: in read_llar_status()
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| /linux/drivers/net/ethernet/mellanox/mlx5/core/en/tc/ |
| H A D | sample.c | 45 struct mlx5e_sample_restore *restore; member
226 /* obj_id is used to restore the sample parameters.
267 struct mlx5e_sample_restore *restore; in sample_restore_get() local
272 hash_for_each_possible(tc_psample->restore_hashtbl, restore, hlist, obj_id) in sample_restore_get()
273 if (restore->obj_id == obj_id) in sample_restore_get()
276 restore = kzalloc(sizeof(*restore), GFP_KERNEL); in sample_restore_get()
277 if (!restore) { in sample_restore_get()
281 restore->obj_id = obj_id; in sample_restore_get()
288 restore->modify_hdr = modify_hdr; in sample_restore_get()
290 restore->rule = esw_add_restore_rule(esw, obj_id); in sample_restore_get()
[all …]
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| /linux/arch/arm/mach-sa1100/ |
| H A D | pm.c | 41 #define RESTORE(x) x = sleep_save[SLEEP_SAVE_##x] macro
97 /* restore registers */ in sa11x0_pm_enter()
98 RESTORE(GPDR); in sa11x0_pm_enter()
99 RESTORE(GAFR); in sa11x0_pm_enter()
101 RESTORE(PPDR); in sa11x0_pm_enter()
102 RESTORE(PPSR); in sa11x0_pm_enter()
103 RESTORE(PPAR); in sa11x0_pm_enter()
104 RESTORE(PSDR); in sa11x0_pm_enter()
106 RESTORE(Ser1SDCR0); in sa11x0_pm_enter()
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| /linux/drivers/gpu/drm/arm/display/komeda/d71/ |
| H A D | d71_dev.c | 28 u32 restore = 0, tbu_status; in get_lpu_event() local
32 restore |= LPU_STATUS_AXIE; in get_lpu_event()
36 restore |= LPU_STATUS_ACE0; in get_lpu_event()
40 restore |= LPU_STATUS_ACE1; in get_lpu_event()
44 restore |= LPU_STATUS_ACE2; in get_lpu_event()
48 restore |= LPU_STATUS_ACE3; in get_lpu_event()
52 restore |= LPU_STATUS_FEMPTY; in get_lpu_event()
56 restore |= LPU_STATUS_FFULL; in get_lpu_event()
60 if (restore != 0) in get_lpu_event()
61 malidp_write32_mask(reg, BLK_STATUS, restore, 0); in get_lpu_event()
[all …]
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| /linux/tools/tracing/rtla/src/ |
| H A D | osnoise.c | 76 * osnoise_restore_cpus - restore the original "osnoise/cpus"
79 * file. This function restore the original config it was previously
100 err_msg("could not restore original osnoise cpus\n"); in osnoise_restore_cpus()
108 * osnoise_put_cpus - restore cpus config and cleanup data
302 * osnoise_restore_runtime_period - restore the original runtime and period
320 err_msg("Could not restore original osnoise runtime/period\n"); in osnoise_restore_runtime_period()
328 * osnoise_put_runtime_period - restore original values and cleanup data
387 * osnoise_restore_timerlat_period_us - restore "timerlat_period_us"
401 err_msg("Could not restore original osnoise timerlat_period_us\n"); in osnoise_restore_timerlat_period_us()
408 * osnoise_put_timerlat_period_us - restore original values and cleanup data
[all …]
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| /linux/drivers/pci/ |
| H A D | vc.c | 20 * pci_vc_save_restore_dwords - Save or restore a series of dwords
23 * @buf: buffer to save to or restore from
24 * @dwords: number of dwords to save/restore
25 * @save: whether to save or restore
172 * pci_vc_do_save_buffer - Size, save, or restore VC state
175 * @save_state: buffer for save/restore
178 * Walking Virtual Channel config space to size, save, or restore it
183 * buffer or restore from it.
194 /* Sanity check buffer size for save/restore */ in pci_vc_do_save_buffer()
212 * therefore save/restore it first, as only VC0 should be enabled in pci_vc_do_save_buffer()
[all …]
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| /linux/drivers/infiniband/hw/mthca/ |
| H A D | mthca_reset.c | 60 * save off the PCI header before reset and then restore it in mthca_reset()
187 /* Now restore the PCI headers */ in mthca_reset()
192 mthca_err(mdev, "Couldn't restore HCA bridge Upstream " in mthca_reset()
199 mthca_err(mdev, "Couldn't restore HCA bridge Downstream " in mthca_reset()
205 * naturally restore it last in this loop. in mthca_reset()
213 mthca_err(mdev, "Couldn't restore HCA bridge reg %x, " in mthca_reset()
222 mthca_err(mdev, "Couldn't restore HCA bridge COMMAND, " in mthca_reset()
232 mthca_err(mdev, "Couldn't restore HCA PCI-X " in mthca_reset()
243 mthca_err(mdev, "Couldn't restore HCA PCI Express " in mthca_reset()
251 mthca_err(mdev, "Couldn't restore HCA PCI Express " in mthca_reset()
[all …]
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| /linux/arch/arm/mach-s3c/ |
| H A D | pm-common.c | 17 /* helper functions to save and restore register state */
36 * s3c_pm_do_restore() - restore register values from the save list.
40 * Restore the register values saved from s3c_pm_do_save().
43 * restore the UARTs state yet
49 pr_debug("restore %p (restore %08lx, was %08x)\n", in s3c_pm_do_restore()
57 * s3c_pm_do_restore_core() - early restore register values from save list.
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| /linux/arch/xtensa/kernel/ |
| H A D | entry.S | 217 s32i a2, a1, PT_WMASK # needed when we restore the reg-file
339 l32i a0, a1, PT_AREG0 # restore saved a0
375 /* It is now save to restore the EXC_TABLE_FIXUP variable. */
427 /* restore return address (or 0 if return to userspace) */
504 * and have to restore WB and WS, extra states, and all registers
569 * Restore optional registers.
575 /* Restore SCOMPARE1 */
586 /* Restore the state of the task and return from the exception. */
594 wsr a3, windowstart # restore WINDOWSTART
598 rsr a1, depc # restore stack pointer
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| /linux/arch/sh/kernel/cpu/sh3/ |
| H A D | swsusp.S | 21 ! - restore registers from swsusp_arch_regs_cpu0
120 mov r2, r15 ! restore old sp
121 mov r5, r8 ! restore old r8
123 ldc r1, sr ! restore old sr
124 lds r0, pr ! restore old pr
130 mov r2, r15 ! restore old sp
131 mov r5, r8 ! restore old r8
132 lds r0, pr ! restore old pr
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| /linux/arch/sparc/power/ |
| H A D | hibernate_asm.S | 43 restore
47 restore
97 /* Restore window regs */
109 /* Restore state regs */
115 /* Restore global regs */
122 restore
123 restore
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| /linux/arch/arm/kernel/ |
| H A D | entry-header.S | 30 * (due to slow/fast restore user regs).
158 @ restore process sp
161 @ restore original r4-r11
164 @ restore main sp
223 @ ARM mode SVC restore
232 @ Thumb mode SVC restore
251 @ mode to restore the final part of the register state.
266 @ ARM mode restore
277 @ Thumb mode restore
310 @ ARM mode restore
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| /linux/arch/sh/kernel/cpu/shmobile/ |
| H A D | sleep.S | 267 /* restore vbr */
275 /* restore sp */
278 /* restore sleep mode register */
292 /* restore mmu and cache state if needed */
297 /* restore mmu state */
323 /* restore cache settings */
334 /* restore general purpose registers if needed */
339 /* switch to bank 1, restore low registers */
347 /* switch to bank0, restore low registers */
356 /* restore the rest of the registers */
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| /linux/arch/arc/kernel/ |
| H A D | fpu.c | 3 * fpu.c - save/restore of Floating Point Unit Registers on task switch
14 * To save/restore FPU regs, simplest scheme would use LR/SR insns.
25 * dexcl1 0, r1, r0 ; restore dpfp1 to orig value
72 struct arc_fpu *restore = &next->thread.fpu; in fpu_save_restore() local
78 write_aux_reg(ARC_REG_FPU_CTRL, restore->ctrl); in fpu_save_restore()
79 write_aux_reg(ARC_REG_FPU_STATUS, (fwe | restore->status)); in fpu_save_restore()
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| /linux/Documentation/driver-api/pm/ |
| H A D | notifiers.rst | 14 before hibernation/suspend or after restore/resume, but they require the system
20 resume/restore, but they cannot do it by calling :c:func:`request_firmware()`
37 error occurred during hibernation. Device restore callbacks have been
41 The system is going to restore a hibernation image. If all goes well,
46 An error occurred during restore from hibernation. Device restore
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| /linux/arch/sparc/include/asm/ |
| H A D | switch_to_32.h | 44 "restore; restore; restore; restore; restore; restore; restore"); \
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| /linux/drivers/gpu/drm/amd/amdkfd/ |
| H A D | cwsr_trap_handler_gfx10.asm | 276 s_branch L_SKIP_RESTORE //NOT restore. might be a regular trap or save
456 // Restore SQ_WAVE_STATUS.
457 s_and_b64 exec, exec, exec // Restore STATUS.EXECZ, not writable by s_setreg_b32
458 s_and_b64 vcc, vcc, vcc // Restore STATUS.VCCZ, not writable by s_setreg_b32
464 // Only restore fields which the trap handler changes.
795 // restore s_save_buf_rsrc0,1
1095 /* restore LDS */
1140 s_cbranch_scc1 L_RESTORE_LDS_LOOP_W32 //LDS restore is complete?
1154 s_cbranch_scc1 L_RESTORE_LDS_LOOP_W64 //LDS restore is complete?
1156 /* restore VGPRs */
[all …]
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| H A D | cwsr_trap_handler_gfx8.asm | 106 /* Restore */
157 …s_branch L_SKIP_RESTORE //NOT restore. might be a regular trap…
160 s_branch L_RESTORE //restore
177 set_status_without_spi_prio(s_save_status, ttmp2) //restore HW status(SCC)
188 set_status_without_spi_prio(s_save_status, ttmp2) //restore HW status(SCC)
333 // restore s_save_buf_rsrc0,1
413 // restore rsrc3
467 /* restore routine */
491 /* restore LDS */
522 … L_RESTORE_LDS_LOOP //LDS restore is complete?
[all …]
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| /linux/arch/riscv/kvm/ |
| H A D | vcpu_switch.S | 51 /* Save Host and Restore Guest SSTATUS */
54 /* Save Host and Restore Guest HSTATUS */
57 /* Save Host and Restore Guest SCOUNTEREN */
66 /* Restore Guest SEPC */
76 /* Restore Guest GPRs (except A0) */
108 /* Restore Guest A0 */
162 /* Save Guest A0 and Restore Host SSCRATCH */
165 /* Restore Host STVEC */
168 /* Save Guest and Restore Host SCOUNTEREN */
171 /* Save Guest and Restore Host HSTATUS */
[all …]
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| /linux/arch/arm64/kernel/ |
| H A D | suspend.c | 29 * This hook is provided so that cpu_suspend code can restore HW
38 /* Prevent multiple restore hook initializations */ in cpu_suspend_set_dbg_restorer()
52 * We must uninstall the idmap and restore the expected MMU in __cpu_suspend_exit()
57 /* Restore CnP bit in TTBR1_EL1 */ in __cpu_suspend_exit()
70 * Restore HW breakpoint registers to sane values in __cpu_suspend_exit()
86 /* Restore additional feature-specific configuration */ in __cpu_suspend_exit()
167 * Restore pstate flags. OS lock and mdscr have been already in cpu_suspend()
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| /linux/arch/microblaze/kernel/ |
| H A D | entry.S | 214 lwi r2, r1, PT_R2; /* restore SDA */ \
223 lwi r11, r1, PT_R11; /* restore clobbered regs after rval */\
225 lwi r13, r1, PT_R13; /* restore SDA2 */ \
227 lwi r15, r1, PT_R15; /* restore LP */ \
230 lwi r18, r1, PT_R18; /* restore asm scratch reg */ \
243 lwi r31, r1, PT_R31; /* Restore cur task reg */
433 /* We re-enable BIP bit before state restore */
476 4: set_bip; /* Ints masked for state restore */
482 lwi r1, r1, PT_R1 - PT_SIZE;/* Restore user stack pointer. */
486 2: set_bip; /* Ints masked for state restore */
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| /linux/arch/mips/kernel/ |
| H A D | pm.c | 36 * mips_cpu_restore() - Restore general CPU state.
43 /* Restore ASID */ in mips_cpu_restore()
47 /* Restore DSP state */ in mips_cpu_restore()
50 /* Restore UserLocal */ in mips_cpu_restore()
54 /* Restore watch registers */ in mips_cpu_restore()
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