| /freebsd/sys/contrib/device-tree/Bindings/net/ | 
| H A D | smsc911x.txt | 1 * Smart Mixed-Signal Connectivity (SMSC) LAN911x/912x Controller4 - compatible : Should be "smsc,lan<model>", "smsc,lan9115"
 5 - reg : Address and length of the io space for SMSC LAN
 6 - interrupts : one or two interrupt specifiers
 7   - The first interrupt is the SMSC LAN interrupt line
 8   - The second interrupt (if present) is the PME (power
 9     management event) interrupt that is able to wake up the host
 10      system with a 50ms pulse on network activity
 11 - phy-mode : See ethernet.txt file in the same directory
 14 - reg-shift : Specify the quantity to shift the register offsets by
 [all …]
 
 | 
| H A D | smsc,lan9115.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---
 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
 7 title: Smart Mixed-Signal Connectivity (SMSC) LAN911x/912x Controller
 10   - Shawn Guo <shawnguo@kernel.org>
 13   - $ref: ethernet-controller.yaml#
 18       - const: smsc,lan9115
 19       - items:
 20           - enum:
 21               - smsc,lan89218
 [all …]
 
 | 
| /freebsd/sys/contrib/device-tree/src/arm64/rockchip/ | 
| H A D | rk3308-rock-pi-s.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)7 /dts-v1/;
 9 #include <dt-bindings/leds/common.h>
 24 		stdout-path = "serial0:1500000n8";
 28 		compatible = "gpio-leds";
 29 		pinctrl-names = "default";
 30 		pinctrl-0 = <&green_led>, <&heartbeat_led>;
 32 		green-led {
 34 			default-state = "on";
 38 			linux,default-trigger = "default-on";
 [all …]
 
 | 
| H A D | rk3308-rock-s0.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)3 /dts-v1/;
 5 #include <dt-bindings/leds/common.h>
 10 	compatible = "radxa,rock-s0", "rockchip,rk3308";
 20 		stdout-path = "serial0:1500000n8";
 24 		compatible = "gpio-leds";
 25 		pinctrl-names = "default";
 26 		pinctrl-0 = <&pwr_led>;
 28 		led-green {
 30 			default-state = "on";
 [all …]
 
 | 
| H A D | rk3566-box-demo.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)5  * Based on Quartz64 DT by: Peter Geis pgwipeout@gmail.com
 8 /dts-v1/;
 10 #include <dt-bindings/gpio/gpio.h>
 11 #include <dt-bindings/leds/common.h>
 12 #include <dt-bindings/pinctrl/rockchip.h>
 13 #include <dt-bindings/soc/rockchip,vop2.h>
 18 	compatible = "rockchip,rk3566-box-demo", "rockchip,rk3566";
 28 		stdout-path = "serial2:1500000n8";
 31 	gmac1_clkin: external-gmac1-clock {
 [all …]
 
 | 
| H A D | rk3328-a1.dts | 1 // SPDX-License-Identifier: (GPL-2.0-only OR MIT)2 // Copyright (c) 2017-2019 Arm Ltd.
 4 /dts-v1/;
 9 	compatible = "azw,beelink-a1", "rockchip,rk3328";
 21 	 *        /---
 [all...]
 | 
| H A D | rk3566-orangepi-3b-v2.1.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)3 /dts-v1/;
 5 #include "rk3566-orangepi-3b.dtsi"
 9 	compatible = "xunlong,orangepi-3b-v2.1", "xunlong,orangepi-3b", "rockchip,rk3566";
 11 	vccio_phy1: regulator-1v8-vccio-phy {
 12 		compatible = "regulator-fixed";
 13 		regulator-name = "vccio_phy1";
 14 		regulator-always-on;
 15 		regulator-boot-on;
 16 		regulator-max-microvolt = <1800000>;
 [all …]
 
 | 
| H A D | rk3368-lba3368.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)3 /dts-v1/;
 5 #include <dt-bindings/clock/rockchip,rk808.h>
 6 #include <dt-bindings/input/input.h>
 7 #include <dt-bindings/leds/common.h>
 8 #include <dt-bindings/sound/rt5640.h>
 25 		stdout-path = "serial1:115200n8";
 33 	adc-key {
 34 		compatible = "adc-keys";
 35 		io-channels = <&saradc 1>;
 [all …]
 
 | 
| H A D | rk3568-rock-3b.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)3 /dts-v1/;
 5 #include <dt-bindings/gpio/gpio.h>
 6 #include <dt-bindings/leds/common.h>
 7 #include <dt-bindings/pinctrl/rockchip.h>
 8 #include <dt-bindings/soc/rockchip,vop2.h>
 13 	compatible = "radxa,rock-3b", "rockchip,rk3568";
 24 		stdout-path = "serial2:1500000n8";
 27 	hdmi-con {
 28 		compatible = "hdmi-connector";
 [all …]
 
 | 
| H A D | rk3568-wolfvision-pf5-io-expander.dtso | 1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)8 /dts-v1/;
 11 #include <dt-bindings/clock/rk3568-cru.h>
 12 #include <dt-bindings/gpio/gpio.h>
 13 #include <dt-bindings/interrupt-controller/irq.h>
 14 #include <dt-bindings/pinctrl/rockchip.h>
 17 	gmac0_clkin: external-gmac0-clock {
 18 		compatible = "fixed-clock";
 19 		clock-frequency = <50000000>;
 20 		clock-output-names = "gmac0_clkin";
 [all …]
 
 | 
| H A D | rk3566-rock-3c.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)3 /dts-v1/;
 4 #include <dt-bindings/gpio/gpio.h>
 5 #include <dt-bindings/leds/common.h>
 6 #include <dt-bindings/pinctrl/rockchip.h>
 7 #include <dt-bindings/soc/rockchip,vop2.h>
 12 	compatible = "radxa,rock-3c", "rockchip,rk3566";
 22 		stdout-path = "serial2:1500000n8";
 25 	gmac1_clkin: external-gmac1-clock {
 26 		compatible = "fixed-clock";
 [all …]
 
 | 
| H A D | rk3399-orangepi.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)6 /dts-v1/;
 8 #include "dt-bindings/pwm/pwm.h"
 9 #include "dt-bindings/input/input.h"
 10 #include <dt-bindings/interrupt-controller/irq.h>
 11 #include "dt-bindings/usb/pd.h"
 16 	compatible = "xunlong,rk3399-orangepi", "rockchip,rk3399";
 26 		stdout-path = "serial2:1500000n8";
 29 	clkin_gmac: external-gmac-clock {
 30 		compatible = "fixed-clock";
 [all …]
 
 | 
| /freebsd/sys/contrib/device-tree/Bindings/usb/ | 
| H A D | dwc2.yaml | 1 # SPDX-License-Identifier: GPL-2.03 ---
 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
 10   - Rob Herring <robh@kernel.org>
 13   - $ref: usb-drd.yaml#
 14   - $ref: usb-hcd.yaml#
 19       - const: brcm,bcm2835-usb
 20       - const: hisilicon,hi6220-usb
 21       - const: ingenic,jz4775-otg
 22       - const: ingenic,jz4780-otg
 [all …]
 
 | 
| H A D | am33xx-usb.txt | 3 - compatible: ti,am33xx-usb4 - reg: offset and length of the usbss register sets
 5 - ti,hwmods : must be "usb_otg_hs"
 8 at least a control module node, USB node and a PHY node. The second USB
 9 node and its PHY node are optional. The DMA node is also optional.
 11 Reset module
 13 - compatible: ti,am335x-usb-ctrl-module
 14 - reg: offset and length of the "USB control registers" in the "Control
 15   Module" block. A second offset and length for the USB wake up control
 17 - reg-names: "phy_ctrl" for the "USB control registers" and "wakeup" for
 [all …]
 
 | 
| /freebsd/sys/contrib/device-tree/src/arm/rockchip/ | 
| H A D | rv1126-sonoff-ihost.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)16 		stdout-path = "serial2:1500000n8";
 19 	vcc5v0_sys: regulator-vcc5v0-sys {
 20 		compatible = "regulator-fixed";
 21 		regulator-name = "vcc5v0_sys";
 22 		regulator-always-on;
 23 		regulator-boot-on;
 24 		regulator-min-microvolt = <5000000>;
 25 		regulator-max-microvolt = <5000000>;
 28 	sdio_pwrseq: pwrseq-sdio {
 [all …]
 
 | 
| H A D | rk3288-veyron-fievel.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)8 /dts-v1/;
 9 #include "rk3288-veyron.dtsi"
 10 #include "rk3288-veyron-analog-audio.dtsi"
 14 	compatible = "google,veyron-fievel-rev8", "google,veyron-fievel-rev7",
 15 		     "google,veyron-fievel-rev6", "google,veyron-fievel-rev5",
 16 		     "google,veyron-fievel-rev4", "google,veyron-fievel-rev3",
 17 		     "google,veyron-fievel-rev2", "google,veyron-fievel-rev1",
 18 		     "google,veyron-fievel-rev0", "google,veyron-fievel",
 22 		compatible = "regulator-fixed";
 [all …]
 
 | 
| H A D | rk3288-veyron.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)8 #include <dt-bindings/clock/rockchip,rk808.h>
 9 #include <dt-bindings/input/input.h>
 18 		stdout-path = "serial2:115200n8";
 22 	 * The default coreboot on veyron devices ignores memory@0 nodes
 31 	power_button: power-button {
 32 		compatible = "gpio-keys";
 33 		pinctrl-names = "default";
 34 		pinctrl-0 = <&pwr_key_l>;
 36 		key-power {
 [all …]
 
 | 
| /freebsd/sys/contrib/device-tree/Bindings/pci/ | 
| H A D | qcom,pcie.txt | 3 - compatible:7 			- "qcom,pcie-ipq8064" for ipq8064
 8 			- "qcom,pcie-ipq8064-v2" for ipq8064 rev 2 or ipq8065
 9 			- "qcom,pcie-apq8064" for apq8064
 10 			- "qcom,pcie-apq8084" for apq8084
 11 			- "qcom,pcie-msm8996" for msm8996 or apq8096
 12 			- "qcom,pcie-ipq4019" for ipq4019
 13 			- "qcom,pcie-ipq8074" for ipq8074
 14 			- "qcom,pcie-qcs404" for qcs404
 15 			- "qcom,pcie-sc8180x" for sc8180x
 [all …]
 
 | 
| H A D | qcom,pcie.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---
 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
 10   - Bjorn Andersson <bjorn.andersson@linaro.org>
 11   - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
 14   Qualcomm PCIe root complex controller is based on the Synopsys DesignWare
 20       - enum:
 21           - qcom,pcie-apq8064
 22           - qcom,pcie-apq8084
 23           - qcom,pcie-ipq4019
 [all …]
 
 | 
| /freebsd/sys/contrib/device-tree/src/arm64/qcom/ | 
| H A D | sa8295p-adp.dts | 1 // SPDX-License-Identifier: BSD-3-Clause7 /dts-v1/;
 9 #include <dt-bindings/gpio/gpio.h>
 10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
 11 #include <dt-bindings/spmi/spmi.h>
 12 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
 15 #include "sa8540p-pmics.dtsi"
 19 	compatible = "qcom,sa8295p-adp", "qcom,sa8540p";
 26 		stdout-path = "serial0:115200n8";
 29 	dp2-connector {
 [all …]
 
 | 
| H A D | sa8540p-ride.dts | 1 // SPDX-License-Identifier: BSD-3-Clause7 /dts-v1/;
 9 #include <dt-bindings/gpio/gpio.h>
 10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
 13 #include "sa8540p-pmics.dtsi"
 17 	compatible = "qcom,sa8540p-ride", "qcom,sa8540p";
 29 		stdout-path = "serial0:115200n8";
 34 	regulators-0 {
 35 		compatible = "qcom,pm8150-rpmh-regulators";
 36 		qcom,pmic-id = "a";
 [all …]
 
 | 
| H A D | sc8280xp-crd.dts | 1 // SPDX-License-Identifier: BSD-3-Clause7 /dts-v1/;
 9 #include <dt-bindings/gpio/gpio.h>
 10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
 13 #include "sc8280xp-pmics.dtsi"
 17 	compatible = "qcom,sc8280xp-crd", "qcom,sc8280xp";
 26 		compatible = "pwm-backlight";
 28 		enable-gpios = <&pmc8280_1_gpios 8 GPIO_ACTIVE_HIGH>;
 29 		power-supply = <&vreg_edp_bl>;
 31 		pinctrl-names = "default";
 [all …]
 
 | 
| /freebsd/sys/dev/usb/net/ | 
| H A D | if_mugereg.h | 1 /*-2  * SPDX-License-Identifier: BSD-2-Clause
 22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 29  * Definitions for the Microchip LAN78xx USB-to-Ethernet controllers.
 32  * undocumented registers are based on the Linux driver.
 64 #define ETH_HW_CFG_LRST_		(0x1UL << 1)	/* Lite reset */
 65 #define ETH_HW_CFG_SRST_		(0x1UL << 0)	/* Soft reset */
 69 #define ETH_PMT_CTL_PHY_RST_		(0x1UL << 4)	/* PHY reset */
 70 #define ETH_PMT_CTL_WOL_EN_		(0x1UL << 3)	/* PHY wake-on-lan */
 71 #define ETH_PMT_CTL_PHY_WAKE_EN_	(0x1UL << 2)	/* PHY int wake */
 [all …]
 
 | 
| /freebsd/sys/contrib/device-tree/src/arm64/amlogic/ | 
| H A D | meson-g12b-bananapi.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)8 #include <dt-bindings/input/input.h>
 9 #include <dt-bindings/leds/common.h>
 10 #include <dt-bindings/gpio/meson-g12a-gpio.h>
 11 #include <dt-bindings/sound/meson-g12a-tohdmitx.h>
 21 		stdout-path = "serial0:115200n8";
 29 	adc-keys {
 30 		compatible = "adc-keys";
 31 		io-channels = <&saradc 2>;
 32 		io-channel-names = "buttons";
 [all …]
 
 | 
| H A D | meson-gxbb-nanopi-k2.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)6 /dts-v1/;
 8 #include "meson-gxbb.dtsi"
 9 #include <dt-bindings/gpio/gpio.h>
 10 #include <dt-bindings/sound/meson-aiu.h>
 13 	compatible = "friendlyarm,nanopi-k2", "amlogic,meson-gxbb";
 22 		stdout-path = "serial0:115200n8";
 31 		compatible = "gpio-leds";
 33 		led-stat {
 34 			label = "nanopi-k2:blue:stat";
 [all …]
 
 |