Home
last modified time | relevance | path

Searched +full:pwm +full:- +full:map (Results 1 – 25 of 231) sorted by relevance

12345678910

/freebsd/sys/contrib/device-tree/Bindings/pwm/
H A Dpwm-nexus-node.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pwm/pwm-nexus-node.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: PWM Nexus node properties
19 - Herve Codina <herve.codina@bootlin.com>
24 '#pwm-cells': true
26 pwm-map:
27 $ref: /schemas/types.yaml#/definitions/uint32-matrix
29 pwm-map-mask:
[all …]
H A Dpwm.txt1 Specifying PWM information for devices
4 1) PWM user nodes
5 -----------------
7 PWM users should specify a list of PWM devices that they want to use
8 with a property containing a 'pwm-list':
10 pwm-list ::= <single-pwm> [pwm-list]
11 single-pwm ::= <pwm-phandle> <pwm-specifier>
12 pwm-phandle : phandle to PWM controller node
13 pwm-specifier : array of #pwm-cells specifying the given PWM
16 PWM properties should be named "pwms". The exact meaning of each pwms
[all …]
H A Dpwm-tiehrpwm.txt1 TI SOC EHRPWM based PWM controller
4 - compatible: Must be "ti,<soc>-ehrpwm".
5 for am33xx - compatible = "ti,am3352-ehrpwm", "ti,am33xx-ehrpwm";
6 for am4372 - compatible = "ti,am4372-ehrpwm", "ti-am3352-ehrpwm", "ti,am33xx-ehrpwm";
7 for am654 - compatible = "ti,am654-ehrpwm", "ti-am3352-ehrpwm";
8 for da850 - compatible = "ti,da850-ehrpwm", "ti-am3352-ehrpwm", "ti,am33xx-ehrpwm";
9 for dra746 - compatible = "ti,dra746-ehrpwm", "ti-am3352-ehrpwm";
10 - #pwm-cells: should be 3. See pwm.yaml in this directory for a description of
13 - reg: physical base address and size of the registers map.
16 - clocks: Handle to the PWM's time-base and functional clock.
[all …]
H A Dpwm-tiecap.txt4 - compatible: Must be "ti,<soc>-ecap".
5 for am33xx - compatible = "ti,am3352-ecap", "ti,am33xx-ecap";
6 for am4372 - compatible = "ti,am4372-ecap", "ti,am3352-ecap", "ti,am33xx-ecap";
7 for da850 - compatible = "ti,da850-ecap", "ti,am3352-ecap", "ti,am33xx-ecap";
8 for dra746 - compatible = "ti,dra746-ecap", "ti,am3352-ecap";
9 for 66ak2g - compatible = "ti,k2g-ecap", "ti,am3352-ecap";
10 for am654 - compatible = "ti,am654-ecap", "ti,am3352-ecap";
11 - #pwm-cells: should be 3. See pwm.yaml in this directory for a description of
12 the cells format. The PWM channel index ranges from 0 to 4. The only third
14 - reg: physical base address and size of the registers map.
[all …]
/freebsd/sys/contrib/device-tree/src/loongarch/
H A Dloongson-2k2000.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/clock/loongson,ls2k-clk.h>
12 #address-cells = <2>;
13 #size-cells = <2>;
16 #address-cells = <1>;
17 #size-cells = <0>;
34 ref_100m: clock-ref-100m {
35 compatible = "fixed-clock";
[all …]
H A Dloongson-2k1000.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/clock/loongson,ls2k-clk.h>
10 #include <dt-bindings/gpio/gpio.h>
13 #address-cells = <2>;
14 #size-cells = <2>;
17 #address-cells = <1>;
18 #size-cells = <0>;
35 ref_100m: clock-ref-100m {
[all …]
H A Dloongson-2k0500.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/clock/loongson,ls2k-clk.h>
12 #address-cells = <2>;
13 #size-cells = <2>;
16 #address-cells = <1>;
17 #size-cells = <0>;
27 ref_100m: clock-ref-100m {
28 compatible = "fixed-clock";
[all …]
/freebsd/sys/contrib/device-tree/Bindings/gpio/
H A Dgpio-mvebu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/gpio-mvebu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
11 - Andrew Lunn <andrew@lunn.ch>
16 - enum:
17 - marvell,armada-8k-gpio
18 - marvell,orion-gpio
20 - items:
[all …]
/freebsd/sys/contrib/device-tree/src/arm/qcom/
H A Dqcom-msm8226-samsung-matisse-common.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
7 * The .dts should first include qcom-msm8226.dtsi or msm8926.dtsi depending on
11 #include <dt-bindings/input/input.h>
14 /delete-node/ &adsp_region;
15 /delete-node/ &mba_region;
16 /delete-node/ &mpss_region;
17 /delete-node/ &smem_region;
27 #address-cells = <1>;
28 #size-cells = <1>;
31 stdout-path = "display0";
[all …]
H A Dqcom-apq8026-lg-lenok.dts1 // SPDX-License-Identifier: BSD-3-Clause
6 /dts-v1/;
8 #include "qcom-msm8226.dtsi"
10 #include <dt-bindings/clock/qcom,mmcc-msm8974.h>
12 /delete-node/ &adsp_region;
17 chassis-type = "watch";
18 qcom,board-id = <132 0x0a>;
19 qcom,msm-id = <199 0x20000>;
27 stdout-path = "serial0:115200n8";
30 reserved-memory {
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/nvidia/
H A Dtegra194.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra194-clock.h>
3 #include <dt-bindings/gpio/tegra194-gpio.h>
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/mailbox/tegra186-hsp.h>
6 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
7 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
8 #include <dt-bindings/power/tegra194-powergate.h>
9 #include <dt-bindings/reset/tegra194-reset.h>
10 #include <dt-bindings/thermal/tegra194-bpmp-thermal.h>
[all …]
/freebsd/sys/contrib/device-tree/src/arm/marvell/
H A Darmada-xp-mv78230.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
13 #include "armada-xp.dtsi"
17 compatible = "marvell,armadaxp-mv78230", "marvell,armadaxp", "marvell,armada-370-xp";
25 #address-cells = <1>;
26 #size-cells = <0>;
27 enable-method = "marvell,armada-xp-smp";
31 compatible = "marvell,sheeva-v7";
34 clock-latency = <1000000>;
39 compatible = "marvell,sheeva-v7";
[all …]
H A Darmada-xp-mv78260.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
13 #include "armada-xp.dtsi"
17 compatible = "marvell,armadaxp-mv78260", "marvell,armadaxp", "marvell,armada-370-xp";
26 #address-cells = <1>;
27 #size-cells = <0>;
28 enable-method = "marvell,armada-xp-smp";
32 compatible = "marvell,sheeva-v7";
35 clock-latency = <1000000>;
40 compatible = "marvell,sheeva-v7";
[all …]
H A Darmada-xp-mv78460.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
13 #include "armada-xp.dtsi"
17 compatible = "marvell,armadaxp-mv78460", "marvell,armadaxp", "marvell,armada-370-xp";
27 #address-cells = <1>;
28 #size-cells = <0>;
29 enable-method = "marvell,armada-xp-smp";
33 compatible = "marvell,sheeva-v7";
36 clock-latency = <1000000>;
41 compatible = "marvell,sheeva-v7";
[all …]
/freebsd/sys/contrib/device-tree/Bindings/mfd/
H A Dairoha,en7581-gpio-sysctl.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mfd/airoha,en7581-gpio-sysctl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Christian Marangi <ansuelsmth@gmail.com>
11 - Lorenzo Bianconi <lorenzo@kernel.org>
14 Airoha EN7581 SoC GPIO system controller which provided a register map
15 for controlling the GPIO, pins and PWM of the SoC.
20 - const: airoha,en7581-gpio-sysctl
21 - const: syscon
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/freescale/
H A Dfsl-ls1028a.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1028A family SoC.
5 * Copyright 2018-2020 NXP
11 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/thermal/thermal.h>
17 interrupt-parent = <&gic>;
18 #address-cells = <2>;
19 #size-cells = <2>;
22 #address-cells = <1>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm/nxp/ls/
H A Dls1021a.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright 2013-2014 Freescale Semiconductor, Inc.
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/thermal/thermal.h>
10 #address-cells = <2>;
11 #size-cells = <2>;
12 interrupt-parent = <&gic>;
30 #address-cells = <1>;
31 #size-cells = <0>;
34 compatible = "arm,cortex-a7";
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/amlogic/
H A Dmeson-gx.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
14 #include <dt-bindings/interrupt-controller/arm-gic.h>
15 #include <dt-bindings/power/meson-gxbb-power.h>
16 #include <dt-bindings/thermal/thermal.h>
19 interrupt-parent = <&gic>;
20 #address-cells = <2>;
21 #size-cells = <2>;
29 reserved-memory {
[all …]
H A Dmeson-g12b-odroid.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/gpio/meson-g12a-gpio.h>
9 #include <dt-bindings/sound/meson-g12a-toacodec.h>
10 #include <dt-bindings/sound/meson-g12a-tohdmitx.h>
20 stdout-path = "serial0:115200n8";
28 emmc_pwrseq: emmc-pwrseq {
29 compatible = "mmc-pwrseq-emmc";
30 reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;
33 fan: gpio-fan {
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/mediatek/
H A Dmt7986a-bananapi-bpi-r3.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
5 * Frank Wunderlich <frank-w@public-files.de>
9 /dts-v1/;
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/leds/common.h>
13 #include <dt-bindings/pinctrl/mt65xx.h>
18 model = "Bananapi BPI-R3";
19 chassis-type = "embedded";
20 compatible = "bananapi,bpi-r3", "mediatek,mt7986a";
[all …]
H A Dmt7988a-bananapi-bpi-r4.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 /dts-v1/;
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/leds/common.h>
7 #include <dt-bindings/regulator/richtek,rt5190a-regulator.h>
13 stdout-path = "serial0:115200n8";
16 fan: pwm-fan {
17 compatible = "pwm-fan";
19 cooling-levels = <0 80 128 255>;
20 #cooling-cells = <2>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm/intel/ixp/
H A Dintel-ixp42x-linksys-nslu2.dts1 // SPDX-License-Identifier: ISC
6 /dts-v1/;
8 #include "intel-ixp42x.dtsi"
9 #include <dt-bindings/input/input.h>
14 #address-cells = <1>;
15 #size-cells = <1>;
25 stdout-path = "uart0:115200n8";
33 compatible = "gpio-leds";
34 led-status {
37 default-state = "on";
[all …]
/freebsd/sys/contrib/device-tree/src/arm/broadcom/
H A Dbcm-hr2.dtsi33 #include <dt-bindings/interrupt-controller/arm-gic.h>
34 #include <dt-bindings/interrupt-controller/irq.h>
39 interrupt-parent = <&gic>;
40 #address-cells = <1>;
41 #size-cells = <1>;
44 #address-cells = <1>;
45 #size-cell
206 pwm: pwm@31000 { global() label
[all...]
/freebsd/sys/contrib/device-tree/src/riscv/microchip/
H A Dmpfs-icicle-kit-fabric.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 /* Copyright (c) 2020-2021 Microchip Technology Inc */
5 compatible = "microchip,mpfs-icicle-reference-rtlv2210", "microchip,mpfs-icicle-kit",
8 core_pwm0: pwm@40000000 {
9 compatible = "microchip,corepwm-rtl-v4";
11 microchip,sync-update-mask = /bits/ 32 <0>;
12 #pwm-cells = <3>;
18 compatible = "microchip,corei2c-rtl-v7";
20 #address-cells = <1>;
21 #size-cells = <0>;
[all …]
/freebsd/sys/contrib/device-tree/src/riscv/sifive/
H A Dfu740-c000.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
4 /dts-v1/;
6 #include <dt-bindings/clock/sifive-fu740-prci.h>
9 #address-cells = <2>;
10 #size-cells = <2>;
11 compatible = "sifive,fu740-c00
[all...]

12345678910