| /linux/arch/powerpc/mm/book3s64/ |
| H A D | radix_tlb.c | 47 asm volatile("ptesync": : :"memory"); in tlbiel_all_isa300()
211 asm volatile("ptesync": : :"memory"); in fixup_tlbie_va()
216 asm volatile("ptesync": : :"memory"); in fixup_tlbie_va()
225 asm volatile("ptesync": : :"memory"); in fixup_tlbie_va_range()
230 asm volatile("ptesync": : :"memory"); in fixup_tlbie_va_range()
244 asm volatile("ptesync": : :"memory"); in fixup_tlbie_pid()
249 asm volatile("ptesync": : :"memory"); in fixup_tlbie_pid()
258 asm volatile("ptesync": : :"memory"); in fixup_tlbie_lpid_va()
263 asm volatile("ptesync": : :"memory"); in fixup_tlbie_lpid_va()
277 asm volatile("ptesync": : :"memory"); in fixup_tlbie_lpid()
[all …]
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| H A D | radix_pgtable.c | 115 asm volatile("ptesync": : :"memory"); in early_map_kernel_page()
175 asm volatile("ptesync": : :"memory"); in __map_kernel_page()
1009 asm volatile("ptesync": : :"memory"); in vmemmap_set_pmd()
1057 asm volatile("ptesync": : :"memory"); in radix__vmemmap_pte_populate()
1590 /* See ptesync comment in radix__set_pte_at */ in radix__ptep_set_access_flags()
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| H A D | hash_utils.c | 206 asm volatile("ptesync": : :"memory"); in tlbiel_all_isa206()
218 asm volatile("ptesync": : :"memory"); in tlbiel_all_isa300()
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| /linux/arch/powerpc/lib/ |
| H A D | code-patching.c | 303 asm volatile("ptesync": : :"memory"); in __do_patch_mem_mm()
317 * ptesync to order PTE update before TLB invalidation done in __do_patch_mem_mm()
340 /* See ptesync comment in radix__set_pte_at() */ in __do_patch_mem()
342 asm volatile("ptesync": : :"memory"); in __do_patch_mem()
489 asm volatile("ptesync" ::: "memory"); in __do_patch_instructions_mm()
505 * ptesync to order PTE update before TLB invalidation done in __do_patch_instructions_mm()
532 /* See ptesync comment in radix__set_pte_at() */ in __do_patch_instructions()
534 asm volatile("ptesync" ::: "memory"); in __do_patch_instructions()
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| /linux/arch/powerpc/include/asm/ |
| H A D | cacheflush.h | 19 * Book3s has no ptesync after setting a pte, so without this ptesync it's
27 asm volatile("ptesync" ::: "memory"); in flush_cache_vmap()
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| H A D | synch.h | 30 asm volatile("ptesync": : :"memory"); in ppc_after_tlbiel_barrier()
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| /linux/arch/powerpc/include/asm/book3s/64/ |
| H A D | radix.h | 218 * The architecture suggests a ptesync after setting the pte, which in radix__set_pte_at()
226 * in user faults on POWER9. Avoiding ptesync here is a significant in radix__set_pte_at()
228 * from ptesync, it should probably go into update_mmu_cache, rather in radix__set_pte_at()
232 * is a ptesync in flush_cache_vmap, and __map_kernel_page() follows in radix__set_pte_at()
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| /linux/arch/powerpc/mm/ |
| H A D | pageattr.c | 66 /* See ptesync comment in radix__set_pte_at() */ in change_page_attr()
68 asm volatile("ptesync": : :"memory"); in change_page_attr()
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| /linux/arch/powerpc/kvm/ |
| H A D | book3s_hv_rm_mmu.c | 394 asm volatile("ptesync" : : : "memory"); in kvmppc_do_h_enter()
438 * Need the extra ptesync to make sure we don't in fixup_tlbie_lpid()
441 asm volatile("ptesync": : :"memory"); in fixup_tlbie_lpid()
448 asm volatile("ptesync": : :"memory"); in fixup_tlbie_lpid()
466 asm volatile("ptesync" : : : "memory"); in do_tlbies()
473 asm volatile("eieio; tlbsync; ptesync" : : : "memory"); in do_tlbies()
476 asm volatile("ptesync" : : : "memory"); in do_tlbies()
481 asm volatile("ptesync" : : : "memory"); in do_tlbies()
737 asm volatile("ptesync" : : : "memory"); in kvmppc_h_protect()
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| H A D | book3s_hv_p9_entry.c | 336 * See switch_mmu_to_guest_radix. ptesync should not be required here in switch_mmu_to_guest_hpt()
436 asm volatile("ptesync": : :"memory"); in flush_guest_tlb()
447 asm volatile("ptesync": : :"memory"); in flush_guest_tlb()
472 * were set. The others must still execute a ptesync. in check_need_tlb_flush()
488 asm volatile("ptesync" ::: "memory"); in check_need_tlb_flush()
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| H A D | book3s_hv_builtin.c | 617 asm volatile("ptesync": : :"memory"); in flush_guest_tlb()
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| /linux/tools/perf/pmu-events/arch/powerpc/power10/ |
| H A D | memory.json | 35 …"BriefDescription": "Ptesync instruction finished in the store unit. Only one ptesync can finish a…
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| H A D | translation.json | 10 … cpabort, copy, tcheck, tend, stsync, dcbst, icbi, dcbf, hwsync, lwsync, ptesync, eieio, msgsync)."
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| H A D | pipeline.json | 90 …he store unit. This does not include cycles spent handling store misses, PTESYNC instructions or T…
420 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was a PTESYNC instruct…
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| H A D | metrics.json | 310 …rage cycles per completed instruction when the NTC instruction is executing a PTESYNC instruction",
770 … "BriefDescription": "Average number of PTESYNC instructions finshed per completed instruction",
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| /linux/arch/powerpc/kernel/ |
| H A D | idle_book3s.S | 129 * We have to store a GPR somewhere, ptesync, then reload it, and create
137 ptesync; \
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| /linux/arch/powerpc/platforms/pasemi/ |
| H A D | powersave.S | 28 ptesync ; \
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| /linux/tools/perf/pmu-events/arch/powerpc/power9/ |
| H A D | other.json | 1750 …"BriefDescription": "A ptesync instruction was counted when the instruction is decoded and transmi…
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| /linux/arch/powerpc/xmon/ |
| H A D | ppc-opc.c | 5846 {"ptesync", XSYNC(31,598,2), 0xffffffff, PPC64, 0, {0}},
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