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Searched full:pcie20 (Results 1 – 13 of 13) sorted by relevance

/linux/Documentation/devicetree/bindings/clock/
H A Dqcom,ipq5018-gcc.yaml28 - description: PCIE20 PHY0 pipe clock source
29 - description: PCIE20 PHY1 pipe clock source
/linux/arch/arm64/boot/dts/rockchip/
H A Drk3588s-orangepi-5.dts11 vcc3v3_pcie20: regulator-vcc3v3-pcie20 {
H A Drk3568-nanopi-r5c.dts102 pcie20_reset_pin: pcie20-reset-pin {
H A Drk3588-fet3588-c.dtsi32 pcie20_avdd0v85: regulator-pcie20-avdd0v85 {
42 pcie20_avdd1v8: regulator-pcie20-avdd1v8 {
H A Drk3588-coolpi-cm5.dtsi39 avdd0v85_pcie20: regulator-avdd0v85-pcie20 {
49 avdd1v8_pcie20: regulator-avdd1v8-pcie20 {
H A Drk3566-orangepi-3b.dtsi487 pcie20_pins: pcie20-pins {
494 pcie20_pwren: pcie20-pwren {
H A Drk3568-radxa-e25.dts144 pcie20_reset_h: pcie20-reset-h {
H A Drk3588-toybrick-x0.dts64 pcie20_avdd0v85: regulator-pcie20-avdd0v85 {
74 pcie20_avdd1v8: regulator-pcie20-avdd1v8 {
H A Drk3566-odroid-m1s.dts508 pcie20_pins: pcie20-pins {
H A Drk3588s-roc-pc.dts124 vcc3v3_pcie20: regulator-vcc3v3-pcie20 {
H A Drk3562-pinctrl.dtsi794 pcie20 {
818 pcie20_buttonrstn: pcie20-buttonrstn {
H A Drk3568-pinctrl.dtsi1475 pcie20 {
1510 pcie20_buttonrstn: pcie20-buttonrstn {
/linux/drivers/pinctrl/
H A Dpinctrl-rockchip.c1127 RK_MUXROUTE_GRF(0, RK_PA5, 3, 0x0314, WRITE_MASK_VAL(3, 2, 0)), /* PCIE20 IO mux M0 */
1128 RK_MUXROUTE_GRF(2, RK_PD0, 4, 0x0314, WRITE_MASK_VAL(3, 2, 1)), /* PCIE20 IO mux M1 */
1129 RK_MUXROUTE_GRF(1, RK_PB0, 4, 0x0314, WRITE_MASK_VAL(3, 2, 2)), /* PCIE20 IO mux M2 */