| /freebsd/sys/contrib/device-tree/Bindings/clock/ti/ |
| H A D | dpll.txt | 4 register-mapped DPLL with usually two selectable input clocks
9 sub-types, which effectively result in slightly different setup
12 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
15 - compatible : shall be one of:
16 "ti,omap3-dpll-clock",
17 "ti,omap3-dpll-core-clock",
18 "ti,omap3-dpll-per-clock",
19 "ti,omap3-dpll-per-j-type-clock",
20 "ti,omap4-dpll-clock",
21 "ti,omap4-dpll-x2-clock",
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| /freebsd/sys/contrib/device-tree/Bindings/ata/ |
| H A D | imx-sata.txt | 7 - compatible : should be one of the following:
8 - "fsl,imx53-ahci" for i.MX53 SATA controller
9 - "fsl,imx6q-ahci" for i.MX6Q SATA controller
10 - "fsl,imx6qp-ahci" for i.MX6QP SATA controller
11 - interrupts : interrupt mapping for SATA IRQ
12 - reg : registers mapping
13 - clocks : list of clock specifiers, must contain an entry for each
14 required entry in clock-names
15 - clock-names : should include "sata", "sata_ref" and "ahb" entries
18 - fsl,transmit-level-mV : transmit voltage level, in millivolts.
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| H A D | imx-sata.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/ata/imx-sata.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shawn Guo <shawn.guo@linaro.org>
19 - fsl,imx53-ahci
20 - fsl,imx6q-ahci
21 - fsl,imx6qp-ahci
22 - fsl,imx8qm-ahci
33 - description: sata clock
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| /freebsd/sys/dev/isci/scil/ |
| H A D | scu_bios_definitions.h | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause OR GPL-2.0
9 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
22 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
28 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
45 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
64 * stand-alone where the library is excluded. By excluding
208 * in APC mode, if ANY of the phy mask is non-zero,
224 * indicates there are no restrictions.
230 * Spread Spectrum Clocking (SSC) setting for Tx:
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| H A D | sci_overview.h | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause OR GPL-2.0
9 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
22 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
28 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
45 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
63 -# SCI Base classes
64 -# SCI Core
65 -# SCI Framework
67 It is important to recognize that no component, object, or functionality in
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| /freebsd/sys/arm/freescale/vybrid/ |
| H A D | vf_anadig.c | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2013-2014 Ruslan Bukin <br@bsdpad.com>
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
58 #define ANADIG_PLL2_SS 0x040 /* PLL2 Spread Spectrum */
77 #define ANADIG_PLL1_SS 0x280 /* PLL1 Spread Spectrum */
112 { -1, 0 }
122 if (!ofw_bus_is_compatible(dev, "fsl,mvf600-anadig")) in anadig_probe()
183 if (bus_alloc_resources(dev, anadig_spec, sc->res)) { in anadig_attach()
189 sc->bst = rman_get_bustag(sc->res[0]); in anadig_attach()
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| /freebsd/sys/arm64/rockchip/ |
| H A D | rk3568_combphy.c | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
49 #include <contrib/device-tree/include/dt-bindings/phy/phy.h>
57 {"rockchip,rk3568-naneng-combphy", 1},
174 switch (sc->mode) { in rk3568_combphy_enable()
179 bus_write_4(sc->mem, PHYREG7, in rk3568_combphy_enable()
183 bus_write_4(sc->mem, PHYREG15, in rk3568_combphy_enable()
184 bus_read_4(sc->mem, PHYREG15) | PHYREG15_CTLE_EN); in rk3568_combphy_enable()
187 SYSCON_WRITE_4(sc->pipe_phy_grf, PIPE_PHY_GRF_PIPE_CON3, in rk3568_combphy_enable()
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| /freebsd/sys/contrib/device-tree/src/arm/nxp/imx/ |
| H A D | imx6q-cubox-i.dts | 4 * This file is dual-licensed: you can use it either under the terms
35 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
41 /dts-v1/;
44 #include "imx6qdl-sr-som.dtsi"
45 #include "imx6qdl-sr-som-brcm.dtsi"
46 #include "imx6qdl-cubox-i.dtsi"
49 model = "SolidRun Cubox-i Dual/Quad";
50 compatible = "solidrun,cubox-i/q", "fsl,imx6q";
55 fsl,transmit-level-mV = <1104>;
56 fsl,transmit-boost-mdB = <0>;
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| H A D | imx6q-cubox-i-som-v15.dts | 4 * This file is dual-licensed: you can use it either under the terms
35 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
41 /dts-v1/;
44 #include "imx6qdl-sr-som.dtsi"
45 #include "imx6qdl-sr-som-ti.dtsi"
46 #include "imx6qdl-cubox-i.dtsi"
49 model = "SolidRun Cubox-i Dual/Quad (1.5som)";
50 compatible = "solidrun,cubox-i/q", "fsl,imx6q";
55 fsl,transmit-level-mV = <1104>;
56 fsl,transmit-boost-mdB = <0>;
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| H A D | imx6q-cubox-i-emmc-som-v15.dts | 4 * This file is dual-licensed: you can use it either under the terms
35 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
41 /dts-v1/;
44 #include "imx6qdl-sr-som.dtsi"
45 #include "imx6qdl-sr-som-ti.dtsi"
46 #include "imx6qdl-sr-som-emmc.dtsi"
47 #include "imx6qdl-cubox-i.dtsi"
50 model = "SolidRun Cubox-i Dual/Quad (1.5som+emmc)";
51 compatible = "solidrun,cubox-i/q", "fsl,imx6q";
56 fsl,transmit-level-mV = <1104>;
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| H A D | imx6q-hummingboard2-emmc-som-v15.dts | 3 * Copyright (C) 2015 Rabeeh Khoury <rabeeh@solid-run.com>
6 * This file is dual-licensed: you can use it either under the terms
38 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
44 /dts-v1/;
47 #include "imx6qdl-sr-som.dtsi"
48 #include "imx6qdl-sr-som-emmc.dtsi"
49 #include "imx6qdl-sr-som-ti.dtsi"
50 #include "imx6qdl-hummingboard2.dtsi"
59 fsl,transmit-level-mV = <1104>;
60 fsl,transmit-boost-mdB = <0>;
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| H A D | imx6q-hummingboard2.dts | 2 * Copyright (C) 2015 Rabeeh Khoury <rabeeh@solid-run.com>
5 * This file is dual-licensed: you can use it either under the terms
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
42 /dts-v1/;
45 #include "imx6qdl-sr-som.dtsi"
46 #include "imx6qdl-sr-som-brcm.dtsi"
47 #include "imx6qdl-hummingboard2.dtsi"
48 #include "imx6qdl-hummingboard2-emmc.dtsi"
57 fsl,transmit-level-mV = <1104>;
58 fsl,transmit-boost-mdB = <0>;
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| H A D | imx6q-hummingboard2-som-v15.dts | 3 * Copyright (C) 2015 Rabeeh Khoury <rabeeh@solid-run.com>
6 * This file is dual-licensed: you can use it either under the terms
38 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
44 /dts-v1/;
47 #include "imx6qdl-sr-som.dtsi"
48 #include "imx6qdl-sr-som-ti.dtsi"
49 #include "imx6qdl-hummingboard2.dtsi"
58 fsl,transmit-level-mV = <1104>;
59 fsl,transmit-boost-mdB = <0>;
60 fsl,transmit-atten-16ths = <9>;
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| H A D | imx6q-dms-ba16.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 /dts-v1/;
5 #include <dt-bindings/gpio/gpio.h>
6 #include "imx6q-ba16.dtsi"
9 model = "Advantech DMS-BA16";
10 compatible = "advantech,imx6q-dms-ba16", "advantech,imx6q-ba1
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| /freebsd/sys/contrib/device-tree/Bindings/regulator/ |
| H A D | renesas,raa215300.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Biju Das <biju.das.jz@bp.renesas.com>
13 The RAA215300 is a high-performance, low-cost 9-channel PMIC designed for
14 32-bit and 64-bit MCU and MPU applications. It supports DDR3, DDR3L, DDR4,
16 built-in Real-Time Clock (RTC), 32kHz crystal oscillator, and coin cell
18 ideal for System-On-Module (SOM) applications. A spread spectrum feature
19 provides an ease-of-use solution for noise-sensitive audio or RF applications.
25 …-power-management/multi-channel-power-management-ics-pmics/ssdsoc-power-management-ics-pmic-and-pm…
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| /freebsd/sys/contrib/device-tree/Bindings/pci/ |
| H A D | brcm,stb-pcie.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/brcm,stb-pcie.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jim Quinlan <james.quinlan@broadcom.com>
15 - enum:
16 - brcm,bcm2711-pcie # The Raspberry Pi 4
17 - brcm,bcm4908-pcie
18 - brcm,bcm7211-pcie # Broadcom STB version of RPi4
19 - brcm,bcm7216-pcie # Broadcom 7216 Arm
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| H A D | nvidia,tegra194-pcie-ep.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/nvidia,tegra194-pcie-ep.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
12 - Vidya Sagar <vidyas@nvidia.com>
16 inherits all the common properties defined in snps,dw-pcie-ep.yaml. Some
23 Note: On Tegra194's P2972-0000 platform, only C5 controller can be enabled to
29 - nvidia,tegra194-pcie-ep
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| H A D | nvidia,tegra194-pcie.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/nvidia,tegra194-pcie.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
12 - Vidya Sagar <vidyas@nvidia.com>
16 inherits all the common properties defined in snps,dw-pcie.yaml. Some of
20 See nvidia,tegra194-pcie-ep.yaml for details on the Endpoint mode device
26 - nvidia,tegra194-pcie
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| /freebsd/sys/arm/nvidia/tegra124/ |
| H A D | tegra124_clk_pll.c | 1 /*-
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
38 #include <dt-bindings/clock/tegra124-car.h>
88 /* Post divider <-> register value mapping. */
136 PLLE: generate the 100 MHz reference clock for USB 3.0 (spread spectrum)
137 PLLDP: Clock source for eDP/LVDS (spread spectrum)
355 /* PLLE: generate the 100 MHz reference clock for USB 3.0 (spread spectrum) */
365 /* PLLDP: 600 MHz Clock source for eDP/LVDS (spread spectrum) */
417 RD4(sc, sc->base_reg, ®); in pll_enable()
418 if (sc->type != PLL_E) in pll_enable()
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| /freebsd/sys/contrib/device-tree/Bindings/phy/ |
| H A D | phy-cadence-torrent.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/phy-cadence-torrent.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
16 - Swapnil Jakhade <sjakhade@cadence.com>
17 - Yuti Amonkar <yamonkar@cadence.com>
22 - cdns,torrent-phy
23 - ti,j7200-serdes-10g
24 - ti,j721e-serdes-10g
26 '#address-cells':
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| /freebsd/sys/net80211/ |
| H A D | _ieee80211.h | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
5 * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
41 IEEE80211_T_DS, /* direct sequence spread spectrum */
53 * PHY mode; this is not really a mode as multi-mode devices
98 IEEE80211_PROT_NONE = 0, /* no protection */
100 IEEE80211_PROT_RTSCTS = 2, /* RTS-CTS */
113 IEEE80211_AUTH_SHARED = 2, /* shared-key */
115 IEEE80211_AUTH_AUTO = 4, /* auto-select/accept */
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| /freebsd/sys/net/ |
| H A D | if_types.h | 1 /*-
2 * SPDX-License-Identifier: BSD-3-Clause
22 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
41 * http://www.iana.org/assignments/smi-numbers
46 IFT_1822 = 0x2, /* old-style arpanet imp */
63 IFT_CEPT = 0x13, /* E1 - european T1 */
78 IFT_PARA = 0x22, /* parallel-port */
111 IFT_G703AT2MB = 0x43, /* Obsolete see DS1-MIB */
115 IFT_IEEE80211 = 0x47, /* radio spread spectrum (unused) */
134 IFT_HOSTPAD = 0x5a, /* CCITT-ITU X.29 PAD Protocol */
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| /freebsd/sys/arm64/nvidia/tegra210/ |
| H A D | tegra210_clk_pll.c | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
42 #include <dt-bindings/clock/tegra210-car.h>
113 /* Post divider <-> register value mapping. */
442 /* PLLE: 100 MHz reference clock for PCIe/SATA/USB 3.0 (spread spectrum) */
452 /* PLLDP: 270 MHz Clock source fordisplay SOR (spread spectrum) */
603 RD4(sc, sc->base_reg, ®); in pll_enable()
604 if (sc->type != PLL_E) in pll_enable()
607 WR4(sc, sc->base_reg, reg); in pll_enable()
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| /freebsd/sys/contrib/alpine-hal/ |
| H A D | al_hal_serdes_interface.h | 9 found at http://www.gnu.org/licenses/gpl-2.0.html
26 DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
53 /* *INDENT-OFF* */
57 /* *INDENT-ON* */
97 /** No loopback */
103 * No clock used (untimed)
178 * Tx de-emphasis parameters
183 AL_SERDES_TX_DEEMP_C_MINUS, /*< c(-1) */
196 * Transmit Amplitude control signal. Used to define the full-scale
198 * 000 - Not Supported
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| /freebsd/share/doc/papers/timecounter/ |
| H A D | timecounter.ms | 5 .\" ----------------------------------------------------------------------------
6 .\" "THE BEER-WARE LICENSE" (Revision 42):
9 .\" this stuff is worth it, you can buy me a beer in return. Poul-Henning Kamp
10 .\" ----------------------------------------------------------------------------
16 .A "Poul-Henning Kamp" "The FreeBSD Project"
18 The FreeBSD timecounters are an architecture-independent implementation
21 multiplication to canonical timescales based on micro- or nano-seconds
23 synchronisation. Timecounters are implemented using lock-less
24 stable-storage based primitives which scale efficiently in SMP
42 But there is no doubt that it happened very early in the development
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