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/freebsd/sys/contrib/device-tree/Bindings/display/
H A Dallwinner,sun6i-a31-mipi-dsi.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/allwinner,sun6i-a31-mipi-dsi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner A31 MIPI-DSI Controller
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
16 - enum:
17 - allwinner,sun6i-a31-mipi-dsi
18 - allwinner,sun50i-a64-mipi-dsi
[all …]
H A Dmipi-dsi-bus.txt1 MIPI DSI (Display Serial Interface) busses
4 The MIPI Display Serial Interface specifies a serial bus and a protocol for
6 define the syntax used to represent a DSI bus in a device tree.
8 This document describes DSI bus-specific properties only or defines existing
9 standard properties in the context of the DSI bus.
11 Each DSI host provides a DSI bus. The DSI host controller's node contains a
12 set of properties that characterize the bus. Child nodes describe individual
13 peripherals on that bus.
15 The following assumes that only a single peripheral is connected to a DSI
18 DSI host
[all …]
H A Dallwinner,sun8i-r40-tcon-top.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/allwinner,sun8i-r40-tcon-top.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
17 encoder clock source and contains additional TV TCON and DSI gates.
22 / [0] TCON-LCD0
23 | \ MIPI DSI
25 \ / [1] TCON-LCD1 - LCD1/LVDS1
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H A Dst,stm32-dsi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/st,stm32-dsi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STM32 DSI host controller
10 - Philippe Cornu <philippe.cornu@foss.st.com>
11 - Yannick Fertre <yannick.fertre@foss.st.com>
14 The STMicroelectronics STM32 DSI controller uses the Synopsys DesignWare MIPI-DSI host controller.
17 - $ref: dsi-controller.yaml#
21 const: st,stm32-dsi
[all …]
/freebsd/sys/contrib/device-tree/Bindings/display/exynos/
H A Dexynos_dsim.txt1 Exynos MIPI DSI Master
4 - compatible: value should be one of the following
5 "samsung,exynos3250-mipi-dsi" /* for Exynos3250/3472 SoCs */
6 "samsung,exynos4210-mipi-dsi" /* for Exynos4 SoCs */
7 "samsung,exynos5410-mipi-dsi" /* for Exynos5410/5420/5440 SoCs */
8 "samsung,exynos5422-mipi-dsi" /* for Exynos5422/5800 SoCs */
9 "samsung,exynos5433-mipi-dsi" /* for Exynos5433 SoCs */
10 - reg: physical base address and length of the registers set for the device
11 - interrupts: should contain DSI interrupt
12 - clocks: list of clock specifiers, must contain an entry for each required
[all …]
/freebsd/sys/contrib/device-tree/Bindings/soc/imx/
H A Dfsl,imx8mm-disp-blk-ctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx8mm-disp-blk-ctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX8MM DISP blk-ctrl
10 - Lucas Stach <l.stach@pengutronix.de>
13 The i.MX8MM DISP blk-ctrl is a top-level peripheral providing access to
14 the NoC and ensuring proper power sequencing of the display and MIPI CSI
20 - const: fsl,imx8mm-disp-blk-ctrl
21 - const: syscon
[all …]
H A Dfsl,imx8mn-disp-blk-ctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx8mn-disp-blk-ctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX8MN DISP blk-ctrl
10 - Lucas Stach <l.stach@pengutronix.de>
13 The i.MX8MN DISP blk-ctrl is a top-level peripheral providing access to
14 the NoC and ensuring proper power sequencing of the display and MIPI CSI
20 - const: fsl,imx8mn-disp-blk-ctrl
21 - const: syscon
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H A Dfsl,imx8mp-media-blk-ctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx8mp-media-blk-ctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Paul Elder <paul.elder@ideasonboard.com>
13 The i.MX8MP Media Block Control (MEDIA BLK_CTRL) is a top-level peripheral
20 - const: fsl,imx8mp-media-blk-ctrl
21 - const: syscon
26 '#address-cells':
29 '#size-cells':
[all …]
/freebsd/sys/contrib/device-tree/Bindings/display/bridge/
H A Drenesas,dsi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/renesas,dsi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas RZ/G2L MIPI DSI Encoder
10 - Biju Das <biju.das.jz@bp.renesas.com>
13 This binding describes the MIPI DSI encoder embedded in the Renesas
14 RZ/G2L alike family of SoC's. The encoder can operate in DSI mode, with
18 - $ref: /schemas/display/dsi-controller.yaml#
23 - enum:
[all …]
H A Dps8640.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MIPI DSI to eDP Video Format Converter
10 - Nicolas Boichat <drinkcat@chromium.org>
13 The PS8640 is a low power MIPI-to-eDP video format converter supporting
15 device accepts a single channel of MIPI DSI v1.1, with up to four lanes
28 powerdown-gpios:
32 reset-gpios:
36 vdd12-supply:
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H A Dcdns,dsi.txt1 Cadence DSI bridge
4 The Cadence DSI bridge is a DPI to DSI bridge supporting up to 4 DSI lanes.
7 - compatible: should be set to "cdns,dsi".
8 - reg: physical base address and length of the controller's registers.
9 - interrupts: interrupt line connected to the DSI bridge.
10 - clocks: DSI bridge clocks.
11 - clock-names: must contain "dsi_p_clk" and "dsi_sys_clk".
12 - phys: phandle link to the MIPI D-PHY controller.
13 - phy-names: must contain "dphy".
14 - #address-cells: must be set to 1.
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H A Dti,sn65dsi86.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: SN65DSI86 DSI to eDP bridge chip
10 - Sandeep Panda <spanda@codeaurora.org>
13 The Texas Instruments SN65DSI86 bridge takes MIPI DSI in and outputs eDP.
23 enable-gpios:
27 suspend-gpios:
31 no-hpd:
37 vccio-supply:
[all …]
H A Dadi,adv7533.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lauren
[all...]
H A Danalogix,anx7625.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Xin Ji <xji@analogixsemi.com>
14 The ANX7625 is an ultra-low power 4K Mobile HD Transmitter
28 enable-gpios:
32 reset-gpios:
36 vdd10-supply:
39 vdd18-supply:
42 vdd33-supply:
[all …]
/freebsd/sys/contrib/device-tree/Bindings/phy/
H A Dallwinner,sun6i-a31-mipi-dphy.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/phy/allwinner,sun6i-a31-mipi-dphy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner A31 MIPI D-PHY Controller
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
14 "#phy-cells":
19 - const: allwinner,sun6i-a31-mipi-dphy
20 - const: allwinner,sun50i-a100-mipi-dphy
[all …]
/freebsd/sys/contrib/device-tree/Bindings/display/tegra/
H A Dnvidia,tegra20-dsi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-dsi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
16 - enum:
17 - nvidia,tegra20-dsi
18 - nvidia,tegra30-dsi
19 - nvidia,tegra114-dsi
[all …]
H A Dnvidia,tegra20-host1x.txt4 - compatible: "nvidia,tegra<chip>-host1x"
5 - reg: Physical base address and length of the controller's registers.
6 For pre-Tegra186, one entry describing the whole register area.
7 For Tegra186, one entry for each entry in reg-names:
8 "vm" - VM region assigned to Linux
9 "hypervisor" - Hypervisor region (only if Linux acts as hypervisor)
10 - interrupts: The interrupt outputs from the controller.
11 - #address-cells: The number of cells used to represent physical base addresses
13 - #size-cells: The number of cells used to represent the size of an address
15 - ranges: The mapping of the host1x address space to the CPU address space.
[all …]
/freebsd/sys/contrib/device-tree/Bindings/bus/
H A Dfsl,imx8qxp-pixel-link-msi-bus.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/bus/fs
[all...]
/freebsd/sys/contrib/device-tree/Bindings/display/msm/
H A Ddsi-controller-main.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/dsi
[all...]
/freebsd/sys/contrib/device-tree/src/riscv/allwinner/
H A Dsunxi-d1s-t113.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 // Copyright (C) 2021-2022 Samuel Holland <samuel@sholland.org>
4 #include <dt-bindings/clock/sun6i-rtc.h>
5 #include <dt-bindings/clock/sun8i-de2.h>
6 #include <dt-bindings/clock/sun8i-tco
652 dsi: dsi@5450000 { global() label
[all...]
/freebsd/sys/contrib/device-tree/src/arm/mediatek/
H A Dmt7623n.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright © 2017-2020 MediaTek Inc.
10 #include <dt-bindings/memory/mt2701-larb-port.h>
19 compatible = "mediatek,mt7623-g3dsys",
20 "mediatek,mt2701-g3dsys",
23 #clock-cell
185 dsi: dsi@1400c000 { global() label
[all...]
/freebsd/sys/contrib/device-tree/src/arm/allwinner/
H A Dsun8i-a33.dtsi2 * Copyright 2014 Chen-Yu Tsai
4 * Chen-Yu Tsai <wens@csie.org>
6 * This file is dual-licensed: you can use it either under the terms
45 #include "sun8i-a23-a33.dtsi"
46 #include <dt-bindings/thermal/thermal.h>
49 cpu0_opp_table: opp-table-cpu {
50 compatible = "operating-points-v2";
51 opp-shared;
53 opp-120000000 {
54 opp-hz = /bits/ 64 <120000000>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/freescale/
H A Dimx8mn.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx8mn-clock.h>
7 #include <dt-bindings/power/imx8mn-power.h>
8 #include <dt-bindings/reset/imx8mq-reset.h>
9 #include <dt-binding
[all...]
H A Dimx8x-colibri.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
8 stdout-path = &lpuart3;
11 colibri_gpio_keys: gpio-keys {
12 compatible = "gpio-keys";
13 pinctrl-names = "default";
14 pinctrl-0 = <&pinctrl_gpiokeys>;
17 key-wakeup {
18 debounce-interval = <10>;
20 label = "Wake-Up";
22 wakeup-source;
[all …]
/freebsd/sys/contrib/device-tree/Bindings/arm/tegra/
H A Dnvidia,tegra20-pmc.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/arm/tegra/nvidia,tegra20-pmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jonathan Hunter <jonathanh@nvidia.com>
16 - nvidia,tegra20-pmc
17 - nvidia,tegra30-pmc
18 - nvidia,tegra114-pmc
19 - nvidia,tegra124-pmc
[all …]

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