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Searched full:main_pll (Results 1 – 7 of 7) sorted by relevance

/linux/drivers/clk/socfpga/
H A Dclk-agilex.c229 { AGILEX_MAIN_PLL_CLK, "main_pll", pll_mux, ARRAY_SIZE(pll_mux),
236 { AGILEX_MAIN_PLL_C0_CLK, "main_pll_c0", "main_pll", NULL, 1, 0, 0x54, 0},
237 { AGILEX_MAIN_PLL_C1_CLK, "main_pll_c1", "main_pll", NULL, 1, 0, 0x54, 8},
238 { AGILEX_MAIN_PLL_C2_CLK, "main_pll_c2", "main_pll", NULL, 1, 0, 0x54, 16},
239 { AGILEX_MAIN_PLL_C3_CLK, "main_pll_c3", "main_pll", NULL, 1, 0, 0x54, 24},
247 { AGILEX_MAIN_PLL_C0_CLK, "main_pll_c0", "main_pll", NULL, 1, 0, 0x58},
248 { AGILEX_MAIN_PLL_C1_CLK, "main_pll_c1", "main_pll", NULL, 1, 0, 0x5C},
249 { AGILEX_MAIN_PLL_C2_CLK, "main_pll_c2", "main_pll", NULL, 1, 0, 0x64},
250 { AGILEX_MAIN_PLL_C3_CLK, "main_pll_c3", "main_pll", NULL, 1, 0, 0x68},
H A Dclk-s10.c24 { .fw_name = "main_pll",
25 .name = "main_pll", },
185 { STRATIX10_MAIN_PLL_CLK, "main_pll", pll_mux, ARRAY_SIZE(pll_mux),
192 { STRATIX10_MAIN_MPU_BASE_CLK, "main_mpu_base_clk", "main_pll", NULL, 1, 0, 0x84},
193 { STRATIX10_MAIN_NOC_BASE_CLK, "main_noc_base_clk", "main_pll", NULL, 1, 0, 0x88},
H A Dclk-agilex5.c220 .name = "main_pll",
238 { AGILEX5_MAIN_PLL_C0_CLK, "main_pll_c0", "main_pll", NULL, 1, 0,
240 { AGILEX5_MAIN_PLL_C1_CLK, "main_pll_c1", "main_pll", NULL, 1, 0,
242 { AGILEX5_MAIN_PLL_C2_CLK, "main_pll_c2", "main_pll", NULL, 1, 0,
244 { AGILEX5_MAIN_PLL_C3_CLK, "main_pll_c3", "main_pll", NULL, 1, 0,
H A Dclk-pll-a10.c27 #define SOCFPGA_MAIN_PLL_CLK "main_pll"
/linux/drivers/media/tuners/
H A Dtda18271-priv.h166 MAIN_PLL, enumerator
H A Dtda18271-maps.c1036 struct tda18271_pll_map *main_pll; member
1064 case MAIN_PLL: in tda18271_lookup_pll_map()
1065 map = priv->maps->main_pll; in tda18271_lookup_pll_map()
1066 map_name = "main_pll"; in tda18271_lookup_pll_map()
1242 .main_pll = tda18271c1_main_pll,
1255 .main_pll = tda18271c2_main_pll,
H A Dtda18271-common.c558 int ret = tda18271_lookup_pll_map(fe, MAIN_PLL, &freq, &pd, &d); in tda18271_calc_main_pll()