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Searched full:lpddr5 (Results 1 – 7 of 7) sorted by relevance

/linux/arch/arm64/boot/dts/apple/
H A Dt600x-pmgr.dtsi138 apple,always-on; /* LPDDR5 interface */
147 apple,always-on; /* LPDDR5 interface */
156 apple,always-on; /* LPDDR5 interface */
165 apple,always-on; /* LPDDR5 interface */
174 apple,always-on; /* LPDDR5 interface */
183 apple,always-on; /* LPDDR5 interface */
192 apple,always-on; /* LPDDR5 interface */
201 apple,always-on; /* LPDDR5 interface */
1223 apple,always-on; /* LPDDR5 interface */
1232 apple,always-on; /* LPDDR5 interface */
[all …]
/linux/Documentation/devicetree/bindings/memory-controllers/
H A Dxlnx,versal-net-ddrmc5.yaml13 The integrated DDR Memory Controllers (DDRMCs) support both DDR5 and LPDDR5
/linux/tools/perf/pmu-events/arch/arm64/freescale/imx94/sys/
H A Dmetrics.json3 "BriefDescription": "bandwidth usage for lpddr5 evk board",
4 "MetricName": "imx94_bandwidth_usage.lpddr5",
/linux/arch/arm64/boot/dts/renesas/
H A Dr8a779g3-sparrow-hawk.dts96 * Page 15 / LPDDR5
99 * with MT62F1G64D8EK-023 WT:C LPDDR5 part populated on the board.
/linux/drivers/i2c/
H A Di2c-smbus.c439 case 0x23: /* LPDDR5 */ in i2c_register_spd()
/linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_dpmm/
H A Ddml2_dpmm_dcn4.c21 /* For lpddr5 bytes per tick changes with mpstate, use table to find uclk*/ in dram_bw_kbps_to_uclk_khz()
/linux/arch/arm64/boot/dts/qcom/
H A Dsm8250.dtsi4081 /* LPDDR5 */
4136 /* LPDDR5 */
4141 /* LPDDR5 */