Searched +full:lpc3220 +full:- +full:udc (Results 1 – 4 of 4) sorted by relevance
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/usb/nxp,lpc3220-udc.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: NXP LPC32xx SoC USB Device Controller (UDC)10 - Frank Li <Frank.Li@nxp.com>14 const: nxp,lpc3220-udc21 - description: USB Device Low Priority Interrupt22 - description: USB Device High Priority Interrupt23 - description: USB Device DMA Interrupt[all …]
1 * NXP LPC32xx SoC USB Device Controller (UDC)4 - compatible: Must be "nxp,lpc3220-udc"5 - reg: Physical base address of the controller and length of memory mapped7 - interrupts: The USB interrupts:12 - transceiver: phandle of the associated ISP1301 device - this is necessary for13 the UDC controller for connecting to the USB physical layer17 isp1301: usb-transceiver@2c {23 compatible = "nxp,lpc3220-udc";25 interrupt-parent = <&mic>;
4 - compatible: must be "nxp,isp1301"5 - reg: I2C address of the ISP1301 device8 - transceiver: phandle of isp1301 - this helps the ISP1301 driver to find the13 isp1301: usb-transceiver@2c {19 compatible = "nxp,lpc3220-udc";21 interrupt-parent = <&mic>;
1 // SPDX-License-Identifier: GPL-2.0+5 * Copyright (C) 2015-2019 Vladimir Zapolskiy <vz@mleia.com>9 #include <dt-bindings/clock/lpc32xx-clock.h>10 #include <dt-bindings/interrupt-controller/irq.h>13 #address-cells = <1>;14 #size-cells = <1>;15 compatible = "nxp,lpc3220";16 interrupt-parent = <&mic>;19 #address-cells = <1>;20 #size-cells = <0>;[all …]