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Searched +full:lpc3220 +full:- +full:gpio (Results 1 – 7 of 7) sorted by relevance

/freebsd/sys/contrib/device-tree/src/arm/nxp/lpc/
H A Dlpc32xx.dtsi1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright (C) 2015-2019 Vladimir Zapolskiy <vz@mleia.com>
9 #include <dt-bindings/clock/lpc32xx-clock.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
13 #address-cells = <1>;
14 #size-cells = <1>;
15 compatible = "nxp,lpc3220";
16 interrupt-parent = <&mic>;
19 #address-cells = <1>;
20 #size-cells = <0>;
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H A Dlpc18xx.dtsi9 * Released under the terms of 3-clause BSD License
14 #include "../../armv7-m.dtsi"
16 #include "dt-bindings/clock/lpc18xx-cgu.h"
17 #include "dt-bindings/clock/lpc18xx-ccu.h"
23 #address-cells = <1>;
24 #size-cells = <1>;
27 #address-cells = <1>;
28 #size-cell
489 gpio: gpio@400f4000 { global() label
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/freebsd/sys/contrib/device-tree/Bindings/gpio/
H A Dnxp,lpc3220-gpio.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/gpio/nxp,lpc3220-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP LPC3220 SoC GPIO controller
10 - Animesh Agarwal <animeshagarwal28@gmail.com>
14 const: nxp,lpc3220-gpio
19 gpio-controller: true
21 '#gpio-cells':
25 0: GPIO P0
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H A Dgpio_lpc32xx.txt1 NXP LPC32xx SoC GPIO controller
4 - compatible: must be "nxp,lpc3220-gpio"
5 - reg: Physical base address and length of the controller's registers.
6 - gpio-controller: Marks the device node as a GPIO controller.
7 - #gpio-cells: Should be 3:
9 0: GPIO P0
10 1: GPIO P1
11 2: GPIO P2
12 3: GPIO P3
17 - bit 0 specifies polarity (0 for normal, 1 for inverted)
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/freebsd/sys/contrib/device-tree/Bindings/mtd/
H A Dlpc32xx-mlc.txt4 - compatible: "nxp,lpc3220-mlc"
5 - reg: Address and size of the controller
6 - interrupts: The NAND interrupt specification
7 - gpios: GPIO specification for NAND write protect
13 - nxp,tcea_delay: TCEA_DELAY
14 - nxp,busy_delay: BUSY_DELAY
15 - nxp,nand_ta: NAND_TA
16 - nxp,rd_high: RD_HIGH
17 - nxp,rd_low: RD_LOW
18 - nxp,wr_high: WR_HIGH
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H A Dlpc32xx-slc.txt4 - compatible: "nxp,lpc3220-slc"
5 - reg: Address and size of the controller
6 - nand-on-flash-bbt: Use bad block table on flash
7 - gpios: GPIO specification for NAND write protect
11 - nxp,wdr-clks: Delay before Ready signal is tested on write (W_RDY)
12 - nxp,rdr-clks: Delay before Ready signal is tested on read (R_RDY)
15 - nxp,wwidth: Write pulse width (W_WIDTH)
16 - nxp,whold: Write hold time (W_HOLD)
17 - nxp,wsetup: Write setup time (W_SETUP)
18 - nxp,rwidth: Read pulse width (R_WIDTH)
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/freebsd/sys/contrib/device-tree/Bindings/serial/
H A D8250.yaml3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - devicetree@vger.kernel.org
13 - $ref: serial.yaml#
14 - $ref: /schemas/memory-controllers/mc-peripheral-props.yaml#
15 - if:
17 - required:
18 - aspeed,lpc-io-reg
19 - required:
20 - aspeed,lpc-interrupts
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