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/linux/arch/arm64/kvm/vgic/
H A Dvgic-its.c3 * GICv3 ITS emulation
28 static int vgic_its_save_tables_v0(struct vgic_its *its);
29 static int vgic_its_restore_tables_v0(struct vgic_its *its);
30 static int vgic_its_commit_v0(struct vgic_its *its);
71 * If this LPI is already mapped on another ITS, we increase its refcount
158 * struct vgic_its_abi - ITS abi ops and settings
162 * @save_tables: save the ITS tables into guest RAM
163 * @restore_tables: restore the ITS internal structs from tables
172 int (*save_tables)(struct vgic_its *its);
173 int (*restore_tables)(struct vgic_its *its);
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H A Dvgic-v4.c19 * - The GICv4 ITS representation offered by the ITS driver
21 * - The virtual ITS, which is the only thing the guest sees
29 * (ITS instance, device, event and irq) using a process that is
44 * guest performs on its LPI through the vITS. For that, a number of
68 * tell the ITS (so that the messages reach the right redistributor).
123 * IRQ. The SGI code will do its magic. in vgic_v4_enable_vsgis()
380 * turns into a VMOVP command at the ITS level. in vgic_v4_load()
430 struct vgic_its *its; in kvm_vgic_v4_set_forwarding() local
440 * Get the ITS, and escape early on error (not a valid in kvm_vgic_v4_set_forwarding()
443 its = vgic_get_its(kvm, irq_entry); in kvm_vgic_v4_set_forwarding()
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/linux/drivers/irqchip/
H A Dirq-gic-v3-its.c44 #include "irq-gic-its-msi-parent.h"
83 * value of BASER register configuration and ITS page size.
95 * The ITS structure - contains most of the infrastructure, with the
131 #define is_v4(its) (!!((its)->typer & GITS_TYPER_VLPIS)) argument
132 #define is_v4_1(its) (!!((its)->typer & GITS_TYPER_VMAPP)) argument
133 #define device_ids(its) (FIELD_GET(GITS_TYPER_DEVBITS, (its)->typer) + 1) argument
165 * The ITS view of a device - belongs to an ITS, owns an interrupt
166 * translation table, and a list of interrupts. If it some of its
172 struct its_node *its; member
298 static bool require_its_list_vmovp(struct its_vm *vm, struct its_node *its) in require_its_list_vmovp() argument
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H A Dirq-gic-v5-its.c6 #define pr_fmt(fmt) "GICv5 ITS: " fmt
22 #include "irq-gic-its-msi-parent.h"
62 static void gicv5_its_dcache_clean(struct gicv5_its_chip_data *its, void *start, in gicv5_its_dcache_clean() argument
67 if (its->flags & ITS_FLAGS_NON_COHERENT) in gicv5_its_dcache_clean()
73 static void its_write_table_entry(struct gicv5_its_chip_data *its, __le64 *entry, in its_write_table_entry() argument
77 gicv5_its_dcache_clean(its, entry, sizeof(*entry)); in its_write_table_entry()
80 #define devtab_cfgr_field(its, f) \ argument
81 FIELD_GET(GICV5_ITS_DT_CFGR_##f, (its)->devtab_cfgr.cfgr)
83 static int gicv5_its_cache_sync(struct gicv5_its_chip_data *its) in gicv5_its_cache_sync() argument
85 return gicv5_wait_for_op_atomic(its->its_base, GICV5_ITS_STATUSR, in gicv5_its_cache_sync()
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H A Dirq-gic-its-msi-parent.c11 #include "irq-gic-its-msi-parent.h"
74 * Also tell the ITS that the signalling will come from a proxy in its_pci_msi_prepare()
85 /* ITS specific DeviceID, as the core ITS ignores dev. */ in its_pci_msi_prepare()
129 /* ITS specific DeviceID */ in its_v5_pci_msi_prepare()
131 /* ITS translate frame physical address */ in its_v5_pci_msi_prepare()
182 * Retrieve the DeviceID and the ITS translate frame node pointer in of_v5_pmsi_get_msi_info()
196 * ITS translate frames). in of_v5_pmsi_get_msi_info()
243 /* ITS specific DeviceID, as the core ITS ignores dev. */ in its_pmsi_prepare()
269 /* ITS specific DeviceID */ in its_v5_pmsi_prepare()
271 /* ITS translate frame physical address */ in its_v5_pmsi_prepare()
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/linux/arch/mips/generic/
H A DPlatform18 its-y := vmlinux.its.S
19 its-$(CONFIG_FIT_IMAGE_FDT_BOSTON) += board-boston.its.S
20 its-$(CONFIG_FIT_IMAGE_FDT_NI169445) += board-ni169445.its.S
21 its-$(CONFIG_FIT_IMAGE_FDT_OCELOT) += board-ocelot.its.S
22 its-$(CONFIG_FIT_IMAGE_FDT_LUTON) += board-luton.its.S
23 its-$(CONFIG_FIT_IMAGE_FDT_JAGUAR2) += board-jaguar2.its.S
24 its-$(CONFIG_FIT_IMAGE_FDT_SERVAL) += board-serval.its.S
25 its-$(CONFIG_FIT_IMAGE_FDT_XILFPGA) += board-xilfpga.its.S
26 its-$(CONFIG_FIT_IMAGE_FDT_MARDUK) += board-marduk.its.S
/linux/arch/um/os-Linux/
H A Dtime.c49 struct itimerspec its; in os_timer_set_interval() local
51 its.it_value.tv_sec = nsecs / UM_NSEC_PER_SEC; in os_timer_set_interval()
52 its.it_value.tv_nsec = nsecs % UM_NSEC_PER_SEC; in os_timer_set_interval()
54 its.it_interval.tv_sec = nsecs / UM_NSEC_PER_SEC; in os_timer_set_interval()
55 its.it_interval.tv_nsec = nsecs % UM_NSEC_PER_SEC; in os_timer_set_interval()
57 if (timer_settime(event_high_res_timer, 0, &its, NULL) == -1) in os_timer_set_interval()
65 struct itimerspec its = { in os_timer_one_shot() local
73 timer_settime(event_high_res_timer, 0, &its, NULL); in os_timer_one_shot()
82 struct itimerspec its; in os_timer_disable() local
84 memset(&its, 0, sizeof(struct itimerspec)); in os_timer_disable()
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/linux/tools/perf/pmu-events/arch/x86/knightslanding/
H A Dcache.json145 …t accounts for responses from a snoop request hit with data forwarded from its Far(not in the same…
155 …t accounts for responses from a snoop request hit with data forwarded from its Far(not in the same…
165 …hat accounts for responses from snoop request hit with data forwarded from its Near-other tile L2 …
175 …t accounts for responses from a snoop request hit with data forwarded from its Near-other tile's L…
185 …t accounts for responses from a snoop request hit with data forwarded from its Near-other tile's L…
195 …ads and prefetch code read requests that accounts for responses which hit its own tile's L2 with …
205 …ads and prefetch code read requests that accounts for responses which hit its own tile's L2 with …
215 …ads and prefetch code read requests that accounts for responses which hit its own tile's L2 with …
225 …ads and prefetch code read requests that accounts for responses which hit its own tile's L2 with …
265 …t accounts for responses from a snoop request hit with data forwarded from its Far(not in the same…
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/linux/Documentation/admin-guide/hw-vuln/
H A Dindirect-target-selection.rst3 Indirect Target Selection (ITS)
6 ITS is a vulnerability in some Intel CPUs that support Enhanced IBRS and were
7 released before Alder Lake. ITS may allow an attacker to control the prediction
10 ITS is assigned CVE-2024-28956 with a CVSS score of 4.7 (Medium).
28 Below is the list of ITS affected CPUs [#f2]_ [#f3]_:
48 - IBPB isolation is affected on all ITS affected CPUs, and need a microcode
53 - Intel Atom CPUs are not affected by ITS.
58 in the lower half of the cacheline are vulnerable to ITS, the basic idea behind
62 compilers. ITS-vulnerable retpoline sites are runtime patched to point to newly
63 added ITS-safe thunks. These safe thunks consists of indirect branch in the
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/linux/Documentation/power/
H A Druntime_pm.rst108 the helper functions described in Section 4 for the device until its status
113 mechanism allowing the device to request a change of its power state, such as
136 4 for the device, until its status is directly set to either 'active', or
148 idle callback with the device as its argument.
264 PM core as 'suspended', regardless of its real hardware status
321 then run pm_runtime_autosuspend(dev) and return its result
382 return its result
386 return its result;
389 if its return value is checked by the caller, as this is likely to
408 pm_request_idle(dev) and return its result
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/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Darm,gic-v5.yaml22 - zero or more ITS (Interrupt Translation Service)
132 "^its@[0-9a-f]+$":
135 GICv5 has zero or more Interrupt Translation Services (ITS) that are
137 ITS is connected to an IRS.
142 const: arm,gic-v5-its
146 - description: ITS config frames
168 Present if the GIC ITS permits programming shareability and
176 GICv5 ITS has one or more translate register frames.
182 - description: ITS translate frames
248 its@2f120000 {
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H A Darm,gic-v3.yaml189 "^gic-its@": false
192 "^(msi-controller|gic-its|interrupt-controller)@[0-9a-f]+$":
195 GICv3 has one or more Interrupt Translation Services (ITS) that are
199 const: arm,gic-v3-its
203 Present if the GIC ITS permits programming shareability and
217 Specifies the base physical address and size of the ITS registers.
220 socionext,synquacer-pre-its:
223 address and size of the pre-ITS window.
258 compatible = "arm,gic-v3-its";
284 compatible = "arm,gic-v3-its";
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/linux/Documentation/admin-guide/device-mapper/
H A Dvdo-design.rst50 the next phase of its operation requires access to the structures in the
54 each zone has an implicit lock on the structures it manages for all its
76 when the index is full, it should cull its oldest records to make space for
113 only a subset of the block name as its key, so it cannot guarantee that an
127 mapping each block name to the chapter containing its newest record. This
131 not been deleted from its chapter. Like the chapter index, the volume index
132 uses only a subset of the block name as its key and can not definitively
140 request looks up its name in the chapter index. This will indicate either
142 new, the request will look for its name in the indicated record page.
160 splitting its key space into many sub-lists, each starting at a fixed key
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/linux/tools/perf/pmu-events/arch/arm64/fujitsu/a64fx/
H A Dpipeline.json75 …"PublicDescription": "This event counts requests in L1D cache pipeline#0 that its sce bit of tagge…
78 …"BriefDescription": "This event counts requests in L1D cache pipeline#0 that its sce bit of tagged…
81 …"PublicDescription": "This event counts requests in L1D cache pipeline#0 that its pfe bit of tagge…
84 …"BriefDescription": "This event counts requests in L1D cache pipeline#0 that its pfe bit of tagged…
87 …"PublicDescription": "This event counts requests in L1D cache pipeline#1 that its sce bit of tagge…
90 …"BriefDescription": "This event counts requests in L1D cache pipeline#1 that its sce bit of tagged…
93 …"PublicDescription": "This event counts requests in L1D cache pipeline#1 that its pfe bit of tagge…
96 …"BriefDescription": "This event counts requests in L1D cache pipeline#1 that its pfe bit of tagged…
129 …"PublicDescription": "This event counts requests in L1D cache pipeline#0 that its sector cache ID …
132 …"BriefDescription": "This event counts requests in L1D cache pipeline#0 that its sector cache ID i…
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/linux/Documentation/ABI/testing/
H A Dsysfs-bus-usb142 connected to its receiver dongle, and, for example, consider
210 which wraps to 0 after its maximum is reached. This file supports
237 connection between a port and its connector.
329 See USB specs for its meaning.
335 See USB specs for its meaning.
344 Changing its value will change the device's configuration
351 See USB specs for its meaning.
357 See USB specs for its meaning.
363 See USB specs for its meaning.
369 See USB specs for its meaning.
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/linux/drivers/acpi/arm64/
H A Diort.c156 * ITS ID and base address to the list from where we can get it back later on.
157 * @trans_id: ITS ID.
158 * @base: ITS base address.
184 * iort_deregister_domain_token() - Deregister domain token based on ITS ID
185 * @trans_id: ITS ID.
205 * iort_find_domain_token() - Find domain token based on given ITS ID
206 * @trans_id: ITS ID.
487 * Get the special ID mapping index (if any) and skip its in iort_node_map_id()
534 * optional step 2: map the initial dev id if its parent is not in iort_node_map_platform_id()
536 * as NC (named component) -> SMMU -> ITS. If the type is matched, in iort_node_map_platform_id()
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/linux/drivers/base/power/
H A Dcommon.c23 * its reference counter. Return 0 if new object has been created or refcount
48 /* kfree() verifies that its argument is nonzero. */ in dev_pm_get_subsys_data()
84 * dev_pm_domain_attach - Attach a device to its PM domain.
122 * dev_pm_domain_attach_by_id - Associate a device with one of its PM domains.
133 * in case its device requires power management through multiple PM domains. The
135 * towards its original device. Depending on the use-case and if needed, the
142 * Returns the virtual created device when successfully attached to its PM
158 * dev_pm_domain_attach_by_name - Associate a device with one of its PM domains.
175 * dev_pm_domain_attach_list - Associate a device with its PM domains.
180 * This function helps to attach a device to its multiple PM domains. The
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/linux/Documentation/admin-guide/
H A Dcgroup-v2.rst157 is no longer referenced in its current hierarchy. Because per-cgroup
269 A process can be migrated into a cgroup by writing its PID to the
320 Marking a cgroup threaded makes it join the resource domain of its
371 A domain cgroup is turned into a threaded domain when one of its child
382 threaded domain, its operations are confined inside each threaded
396 threads in the cgroup and its descendants. All consumptions which
401 between threads in a non-leaf cgroup and its child cgroups. Each
417 live processes in it. Its value is 0 if there is no live process in
418 the cgroup and its descendants; otherwise, 1. poll and [id]notify
467 the target resource across its immediate children will be controlled.
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/linux/Documentation/admin-guide/cgroup-v1/
H A Dcpusets.rst57 include CPUs in its CPU affinity mask, and using the mbind(2) and
58 set_mempolicy(2) system calls to include Memory Nodes in its memory
61 schedule a task on a CPU that is not allowed in its cpus_allowed
145 - in fork and exit, to attach and detach a task from its cpuset.
191 command. The properties of a cpuset, such as its flags, allowed
211 - Its CPUs and Memory Nodes must be a subset of its parents.
212 - It can't be marked exclusive unless its parent is.
213 - If its cpu or memory is exclusive, they may not overlap any sibling.
253 isolating each job's user allocation in its own cpuset. To do this,
398 The algorithmic cost of load balancing and its impact on key shared
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/linux/Documentation/security/
H A DIMA-templates.rst90 - "ima": its format is ``d|n``;
91 - "ima-ng" (default): its format is ``d-ng|n-ng``;
92 - "ima-ngv2": its format is ``d-ngv2|n-ng``;
93 - "ima-sig": its format is ``d-ng|n-ng|sig``;
94 - "ima-sigv2": its format is ``d-ngv2|n-ng|sig``;
95 - "ima-buf": its format is ``d-ng|n-ng|buf``;
96 - "ima-modsig": its format is ``d-ng|n-ng|sig|d-modsig|modsig``;
97 …- "evm-sig": its format is ``d-ng|n-ng|evmsig|xattrnames|xattrlengths|xattrvalues|iuid|igid|imode`…
/linux/rust/kernel/
H A Dopp.rs42 // SAFETY: The requirements are satisfied by the existence of [`Device`] and its safety in new()
182 // SAFETY: The requirements are satisfied by the existence of [`Device`] and its safety in new()
194 // SAFETY: The requirements are satisfied by the existence of [`Device`] and its safety in drop()
499 // SAFETY: The requirements are satisfied by the existence of [`Device`] and its safety in set()
574 /// The following example demonstrates how to get OPP [`Table`] for a [`Cpumask`] and set its
624 // SAFETY: By the safety requirements, ptr is valid and its refcount will be incremented. in from_raw_table()
640 // SAFETY: The requirements are satisfied by the existence of the [`Device`] and its safety in from_dev()
660 // SAFETY: The requirements are satisfied by the existence of the [`Device`] and its safety in from_of()
678 // SAFETY: The requirements are satisfied by the existence of the [`Device`] and its safety in remove_of()
713 // SAFETY: The requirements are satisfied by the existence of [`Device`] and its safety in opp_count()
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/linux/arch/mips/mobileye/
H A DPlatform15 its-y := vmlinux.its.S
16 its-$(CONFIG_FIT_IMAGE_FDT_EPM5) += board-epm5.its.S
/linux/drivers/clk/sunxi-ng/
H A Dccu_phase.c29 /* Get our parent clock, it's the one that can adjust its rate */ in ccu_phase_get_phase()
34 /* And its rate */ in ccu_phase_get_phase()
44 /* And its rate */ in ccu_phase_get_phase()
65 /* Get our parent clock, it's the one that can adjust its rate */ in ccu_phase_set_phase()
70 /* And its rate */ in ccu_phase_set_phase()
80 /* And its rate */ in ccu_phase_set_phase()
/linux/arch/sh/boards/mach-dreamcast/
H A Dirq.c24 * triggered, its corresponding bit in the Event Status Registers (ESRs)
62 /* Disable the hardware event by masking its bit in its EMR */
74 /* Enable the hardware event by setting its bit in its EMR */
86 /* Acknowledge a hardware event by writing its bit back to its ESR */
/linux/Documentation/filesystems/nfs/
H A Dclient-identifier.rst14 There are risks if a client's NFSv4 identifier and its principal
29 The client is responsible for periodically renewing its leases.
33 If a client stops renewing its lease (for example, if it crashes),
37 associated with its previous leases is no longer valid and can be
51 they can associate the client with its lease. Each client's
116 client to reclaim its open and lock state, and may give those locks
126 By default, the Linux NFSv4 client implementation constructs its
147 Linux provides two mechanisms to add uniqueness to its "co_ownerid"
176 AUTH_SYS and UID 0 as the principal part of its client identity.

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