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Searched +full:ipq5332 +full:- +full:usb +full:- +full:hsphy (Results 1 – 3 of 3) sorted by relevance

/linux/Documentation/devicetree/bindings/phy/
H A Dqcom,ipq5332-usb-hsphy.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/qcom,ipq5332-usb-hsphy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: M31 USB PHY
10 - Sricharan Ramabadhran <quic_srichara@quicinc.com>
11 - Varadarajan Narayanan <quic_varada@quicinc.com>
14 USB M31 PHY (https://www.m31tech.com) found in Qualcomm
15 IPQ5018, IPQ5332 SoCs.
20 - enum:
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/linux/drivers/phy/qualcomm/
H A Dphy-qcom-m31.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (c) 2014-2023, The Linux Foundation. All rights reserved.
214 const struct m31_phy_regs *regs = qphy->regs; in m31usb_phy_init()
217 ret = regulator_enable(qphy->vreg); in m31usb_phy_init()
219 dev_err(&phy->dev, "failed to enable regulator, %d\n", ret); in m31usb_phy_init()
223 ret = clk_prepare_enable(qphy->clk); in m31usb_phy_init()
225 regulator_disable(qphy->vreg); in m31usb_phy_init()
226 dev_err(&phy->dev, "failed to enable cfg ahb clock, %d\n", ret); in m31usb_phy_init()
231 reset_control_assert(qphy->reset); in m31usb_phy_init()
233 reset_control_deassert(qphy->reset); in m31usb_phy_init()
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/linux/arch/arm64/boot/dts/qcom/
H A Dipq5332.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
3 * IPQ5332 device tree source
5 * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
8 #include <dt-bindings/clock/qcom,apss-ipq.h>
9 #include <dt-bindings/clock/qcom,ipq5332-gcc.h>
10 #include <dt-bindings/interconnect/qcom,ipq5332.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 interrupt-parent = <&intc>;
15 #address-cells = <2>;
16 #size-cells = <2>;
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