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/titanic_52/usr/src/boot/sys/boot/fdt/dts/arm/
H A Dimx6.dtsi78 interrupts = <27 29>;
85 interrupts = <124>;
102 interrupts = <119 120>;
115 interrupts = <34>;
123 interrupts = <49>;
130 interrupts = <87>;
137 interrupts = <32>;
143 interrupts = < 98 99 >;
154 interrupts = < 100 101 >;
165 interrupts
[all...]
H A Dimx53x.dtsi119 interrupts = <71 72>;
132 interrupts = <50 51 42 43 44 45 46 47 48 49>;
145 interrupts = <52 53>;
157 interrupts = <54 55>;
169 interrupts = <56 57>;
181 interrupts = <103 104>;
193 interrupts = <105 106>;
205 interrupts = <107 108>;
223 interrupt-parent = <&tzic>; interrupts = <1>;
231 interrupt-parent = <&tzic>; interrupts
[all...]
H A Dexynos5.dtsi70 interrupts = < 32 33 34 35 36 37 38 39
91 interrupts = < 29 30 27 26 >;
98 interrupts = < 71 >;
126 interrupts = < 104 >;
135 interrupts = < 105 >;
145 interrupts = < 103 >;
153 interrupts = < 103 >;
161 interrupts = <107>;
170 interrupts = <108>;
179 interrupts
[all...]
H A Dvybrid.dtsi96 interrupts = < 27 29 >;
112 interrupts = < 40 41 >;
122 interrupts = < 42 43 >;
131 interrupts = < 71 >;
139 interrupts = < 72 >;
152 interrupts = < 139 140 141 142 143 >;
168 interrupts = < 115 >;
198 interrupts = < 59 >;
208 interrupts = < 60 >;
224 interrupts
[all...]
H A Dimx51x.dtsi117 interrupts = <71 72>;
130 interrupts = <50 51 42 43 44 45 46 47 48 49>;
143 interrupts = <52 53>;
155 interrupts = <54 55>;
167 interrupts = <56 57>;
185 interrupt-parent = <&tzic>; interrupts = <1>;
193 interrupt-parent = <&tzic>; interrupts = <2>;
201 interrupt-parent = <&tzic>; interrupts = <33>;
211 interrupt-parent = <&tzic>; interrupts = <36>;
219 interrupt-parent = <&tzic>; interrupts
[all...]
H A Dam335x.dtsi52 interrupts = <3>;
79 interrupts = < 66 67 68 69 92 93 94 95 >;
86 interrupts = < 75 76 >;
93 interrupts = < 16 >;
100 interrupts = <91>;
112 interrupts = < 96 97 98 99 32 33 62 63 >;
122 interrupts = < 72 >;
132 interrupts = < 73 >;
143 interrupts = < 74 >;
154 interrupts
[all...]
H A Drk3188.dtsi76 interrupts = < 27 29 >;
83 interrupts = <76>;
91 interrupts = <77>;
99 interrupts = <91>;
107 interrupts = <92>;
115 interrupts = <96>;
131 interrupts = <86>;
140 interrupts = <87>;
149 interrupts = <88>;
158 interrupts
[all...]
H A Dea3250.dts90 interrupts = <16 17>;
97 interrupts = <52>;
107 interrupts = <26>;
117 interrupts = <25>;
127 interrupts = <7>;
137 interrupts = <8>;
147 interrupts = <9>;
157 interrupts = <10>;
167 interrupts = <24>;
186 interrupts
[all...]
H A Darmada-38x.dtsi70 interrupts-extended = <&mpic 3>;
158 interrupts = <GIC_PPI 11 (IRQ_TYPE_EDGE_RISING | GIC_CPU_MASK_SIMPLE(2))>;
166 interrupts = <GIC_PPI 13 (IRQ_TYPE_EDGE_RISING | GIC_CPU_MASK_SIMPLE(2))>;
187 interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
199 interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
209 interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
220 interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
230 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
240 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
344 interrupts
[all...]
H A Dsun7i-a20.dtsi45 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
66 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
93 interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
113 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
145 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
152 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
159 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
166 interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
175 interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
183 interrupts
[all...]
H A Dzedboard.dts83 interrupts = <34>;
91 interrupts = <40>;
113 interrupts = < 27 29 >;
122 interrupts = <41>;
130 interrupts = <30>;
149 // interrupts = <59>;
158 interrupts = <82>;
167 interrupts = <52>;
177 interrupts = <54 55>;
186 interrupts
[all...]
H A Dzybo.dts83 interrupts = <34>;
91 interrupts = <40>;
113 interrupts = < 27 29 >;
122 interrupts = <41>;
130 interrupts = <30>;
149 // interrupts = <59>;
158 interrupts = <82>;
167 interrupts = <52>;
177 interrupts = <54 55>;
186 interrupts
[all...]
/titanic_52/usr/src/uts/common/io/nxge/
H A Dnxge_intr.c30 * This file manages the interrupts for a hybrid I/O (hio) device.
31 * In the future, it may manage interrupts for all Neptune-based
75 nxge_intr_t *interrupts; /* The global interrupt data. */ in nxge_intr_add() local
102 interrupts = (nxge_intr_t *)&nxge->nxge_intr_type; in nxge_intr_add()
106 if ((status2 = ddi_intr_add_handler(interrupts->htable[vector], in nxge_intr_add()
115 interrupts->intr_added++; in nxge_intr_add()
118 if ((status2 = ddi_intr_enable(interrupts->htable[vector])) in nxge_intr_add()
127 interrupts->intr_enabled = B_TRUE; in nxge_intr_add()
165 nxge_intr_t *interrupts; /* The global interrupt data. */ in nxge_intr_remove() local
194 interrupts in nxge_intr_remove()
322 nxge_intr_t *interrupts; /* The global interrupt data. */ nxge_hio_intr_add() local
423 nxge_intr_t *interrupts; /* The global interrupt data. */ nxge_hio_intr_remove() local
523 nxge_intr_t *interrupts; nxge_hio_intr_init() local
686 nxge_intr_t *interrupts; nxge_hio_intr_uninit() local
[all...]
/titanic_52/usr/src/man/man9f/
H A Dddi_intr_get_nintrs.9f8 ddi_intr_get_nintrs, ddi_intr_get_navail \- return number of interrupts
58 Pointer to number of interrupts of the given type that are supported by the
89 Pointer to number of interrupts of the given type that are currently available
96 The \fBddi_intr_get_nintrs()\fR function returns the number of interrupts of
98 return, the number of supported interrupts is returned as an integer pointed to
102 If the hardware device is not found to support any interrupts of the given
107 The \fBddi_intr_get_navail()\fR function returns the number of interrupts of a
109 successful return, the number of available interrupts is returned as an integer
114 all interrupts be allocated. The host software can then use policy-based
115 decisions to determine how many interrupts ar
[all...]
H A Dddi_intr_alloc.9f8 ddi_intr_alloc, ddi_intr_free \- allocate or free interrupts for a given
77 Number of interrupts requested. The \fIcount\fR should not exceed the total
78 number of interrupts supported by the device, as returned by a call to
88 Pointer to the number of interrupts actually allocated
115 The \fBddi_intr_alloc()\fR function allocates interrupts of the interrupt type
117 If \fBddi_intr_alloc()\fR allocates any interrupts, it returns the actual
118 number of interrupts allocated in the integer pointed to by the \fIactualp\fR
123 Specific interrupts are always specified by the combination of interrupt
126 PCI fixed interrupts, \fIinum\fR refers to the interrupt number. The \fIinum\fR
136 If MSI interrupts ar
[all...]
H A Dddi_intr_set_nreq.9f8 ddi_intr_set_nreq \- set the number of interrupts requested for a device driver
40 Number of interrupts requested.
46 The \fBddi_intr_set_nreq()\fR function changes the number of interrupts
58 interrupts supported by the device hardware, as reported by a call to the
60 notifying it in cases when it must release any previously allocated interrupts,
61 or when it is allowed to allocate more interrupts as a result of its new
66 already consuming interrupts, and if it has a registered callback handler that
142 that are using MSI-X interrupts (interrupt type \fBDDI_INTR_TYPE_MSIX\fR).
143 Attempts to use this function for any other type of interrupts fails with
147 The total number of interrupts requeste
[all...]
H A Dddi_cb_register.9f159 For interrupt resource management, the driver has more available interrupts.
170 For interrupt resource management, the driver has fewer available interrupts.
171 The driver must release any previously allocated interrupts in excess of what
185 represents how many interrupts have been added or removed from the total number
195 interrupts that are available to it, but it is required to manage its
196 allocations so that it never uses more interrupts than are currently available.
324 /* Get number of supported interrupts */
397 /* Disable and free interrupts */
471 /* Update actual count of available interrupts */
482 /* Update actual count of available interrupts */
[all...]
H A Dddi_intr_enable.9f10 interrupts
74 Number of interrupts
107 Number of interrupts
117 The \fBddi_intr_block_enable()\fR function enables a range of interrupts given
128 \fBddi_intr_block_enable()\fR function is useful for enabling MSI interrupts
148 The \fBddi_intr_block_disable()\fR function disables a range of interrupts
159 \fBddi_intr_block_disable()\fR function is useful for disabling MSI interrupts
167 the \fBddi_intr_block_enable()\fR function was used to enable the interrupts.
240 If a device driver that uses \fBMSI\fR and \fBMSI-X\fR interrupts resets the
/titanic_52/usr/src/uts/common/io/i40e/
H A Di40e_intr.c22 * There are a couple different sets of interrupts that we need to worry about:
24 * - Interrupts from receive queues
25 * - Interrupts from transmit queues
26 * - 'Other Interrupts', such as the administrative queue
28 * 'Other Interrupts' are asynchronous events such as a link status change event
33 * interrupts from the 'Other Interrupts' section, we need to clear the PBA and
36 * Interrupts from the transmit and receive queues indicates that our requests
45 * All devices supported by this driver support three kinds of interrupts:
47 * o Extended Message Signaled Interrupts (MS
[all...]
/titanic_52/usr/src/boot/sys/boot/fdt/dts/powerpc/
H A Dp3041si.dtsi148 interrupts = <52 2 0 0
218 interrupts = <105 2 0 0>;
224 interrupts = <107 2 0 0>;
230 interrupts = <109 2 0 0>;
236 interrupts = <111 2 0 0>;
242 interrupts = <113 2 0 0>;
248 interrupts = <115 2 0 0>;
254 interrupts = <117 2 0 0>;
260 interrupts = <119 2 0 0>;
266 interrupts
[all...]
H A Dp2041si.dtsi147 interrupts = <52 2 0 0
217 interrupts = <105 2 0 0>;
223 interrupts = <107 2 0 0>;
229 interrupts = <109 2 0 0>;
235 interrupts = <111 2 0 0>;
241 interrupts = <113 2 0 0>;
247 interrupts = <115 2 0 0>;
253 interrupts = <117 2 0 0>;
259 interrupts = <119 2 0 0>;
265 interrupts
[all...]
H A Dp5020si.dtsi138 interrupts = <52 2 0 0
203 interrupts = <105 2 0 0>;
209 interrupts = <107 2 0 0>;
215 interrupts = <109 2 0 0>;
221 interrupts = <111 2 0 0>;
227 interrupts = <113 2 0 0>;
233 interrupts = <115 2 0 0>;
239 interrupts = <117 2 0 0>;
245 interrupts = <119 2 0 0>;
251 interrupts
[all...]
H A Dp2020ds.dts106 interrupts = <19 2>;
227 interrupts = <17 2>;
235 interrupts = <18 2>;
244 interrupts = <43 2>;
255 interrupts = <43 2>;
266 interrupts = <42 2>;
276 interrupts = <42 2>;
283 interrupts = <59 0x2>;
299 interrupts = <76 2>;
306 interrupts
[all...]
H A Dp1020rdb.dts80 interrupts = <19 2>;
209 interrupts = <16 2>;
217 interrupts = <16 2>;
226 interrupts = <43 2>;
241 interrupts = <43 2>;
252 interrupts = <42 2>;
262 interrupts = <42 2>;
272 interrupts = <59 0x2>;
326 interrupts = <47 0x2>;
337 interrupts
[all...]
H A Dmpc8572ds.dts122 interrupts = <19 2>;
254 interrupts = <17 2>;
262 interrupts = <18 2>;
269 interrupts = <18 2>;
278 interrupts = <16 2>;
287 interrupts = <43 2>;
298 interrupts = <43 2>;
316 interrupts = <76 2>;
324 interrupts = <77 2>;
332 interrupts
[all...]

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