/titanic_52/usr/src/uts/common/sys/fibre-channel/fca/qlc/ |
H A D | ql_api.h | 525 #define ISP_EN_INT BIT_15 /* ISP enable interrupts. */ 526 #define ISP_EN_RISC BIT_3 /* ISP enable RISC interrupts. */
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/titanic_52/usr/src/uts/common/io/bnxe/ |
H A D | bnxe_gld.c | 511 * enable interrupts. 549 * interrupts are disabled for this device.
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/titanic_52/usr/src/uts/intel/io/amd8111s/ |
H A D | amd8111s_hw.c | 472 * more interrupts come out. Also some registers must be in mdlHWReset() 532 /* Disable Following Interrupts. */ in mdlHWReset()
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/titanic_52/usr/src/cmd/mdb/sun4u/modules/unix/ |
H A D | unix.c | 1613 { "vecint", "walk the list of registered hardware interrupts", 1615 { "softint", "walk the list of registered software interrupts",
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/titanic_52/usr/src/uts/common/io/elxl/ |
H A D | elxl.c | 1754 * Acknowledge interrupts. in elxl_intr() 1906 /* Disable all interrupts. (0 means "none".) */ in elxl_stop()
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/titanic_52/usr/src/lib/libpkg/common/ |
H A D | pkgtrans.c | 644 /* hold SIGINT/SIGHUP interrupts */ in pkgtrans() 692 /* hold SIGINT/SIGHUP interrupts */ in pkgtrans()
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/titanic_52/usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/ |
H A D | lm_sb.c | 730 - these settings are derived from user configured interrupt coalesing mode and tx/rx interrupts rate (lm params). 1032 /* Assumptions: Called when acking a status-block and enabling interrupts */
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/titanic_52/usr/src/uts/common/io/tpm/ |
H A D | tpm.c | 1201 * interrupts for TPMS, in which case we set up polling) 1240 /* These two interrupts are mandatory */ in tis_init()
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/titanic_52/usr/src/uts/common/io/nxge/npi/ |
H A D | npi_rxdma.c | 2217 * register which is used for generating interrupts. 2279 * register which is used for generating interrupts
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/titanic_52/usr/src/uts/common/io/pciex/ |
H A D | pcie.c | 471 * This function enables generic pci-express interrupts and error 1242 * This function disables generic pci-express interrupts and error
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/titanic_52/usr/src/uts/common/io/rge/ |
H A D | rge_chip.c | 1049 * including enabling interrupts 1352 * rge_intr() -- handle chip interrupts
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/titanic_52/usr/src/uts/sun/io/ |
H A D | socal.c | 3176 * possible incoming interrupts from the soc device. 3234 * Process any request interrupts in socal_intr() 3235 * We only allow request interrupts when the request in socal_intr() 3351 * the soc interrupts us before the response has been DMA'ed in socal_intr_solicited() 3602 * Context : Unsolicited interrupts must be masked
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/titanic_52/usr/src/uts/common/sys/crypto/ |
H A D | dca.h | 598 #define DMASTAT_INTERRUPTS 0x34000000U /* all interrupts */
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/titanic_52/usr/src/uts/common/sys/ib/adapters/tavor/ |
H A D | tavor.h | 463 * available based on the number of interrupts we can receive at once.
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/titanic_52/usr/src/man/man1/ |
H A D | ed.1 | 901 The \fBed\fR utility interrupts its current activity, writes the string
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/titanic_52/usr/src/uts/sun4u/serengeti/io/ |
H A D | ssm.c | 418 * low level interrupts use this mutex. in ssm_attach()
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/titanic_52/usr/src/uts/common/io/1394/targets/dcam1394/ |
H A D | dcam.c | 496 * deregister interrupts in dcam_detach()
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/titanic_52/usr/src/uts/sun/io/audio/drv/audiocs/ |
H A D | audio_4231.h | 185 #define EB2_INT_EN 0x00000010u /* Enable interrupts, R/W */
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/titanic_52/usr/src/uts/common/io/ib/clients/rdsv3/ |
H A D | af_rds.c | 148 * get here from interrupts, whereas the network code grabs sk_callback_lock
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/titanic_52/usr/src/uts/common/io/e1000api/ |
H A D | README | 386 6303973 System hard hangs when sharing interrupts (in PIC) mode
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/titanic_52/usr/src/uts/common/io/e1000g/ |
H A D | e1000g_rx.c | 599 "Process Receive Interrupts: Error in Packet\n"); in e1000g_receive()
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H A D | README | 386 6303973 System hard hangs when sharing interrupts (in PIC) mode
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H A D | e1000g_sw.h | 245 #define ATTACH_PROGRESS_ENABLE_INTR 0x0800 /* DDI interrupts enabled */
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/titanic_52/usr/src/uts/i86pc/io/ |
H A D | immu_intrmap.c | 87 * even for level-triggered interrupts in the interrupt-remapping engine.
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/titanic_52/usr/src/uts/i86pc/io/pcplusmp/ |
H A D | apic_introp.c | 606 * an error if the CPU is not accepting interrupts. If the first one in apic_grp_set_cpu()
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