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/titanic_52/usr/src/uts/sun4/io/px/
H A Dpx.c290 * register and enable their own interrupts. in px_attach()
1413 * PCI-E nexus driver supports fixed, MSI and MSI-X interrupts. in px_intr_ops()
/titanic_52/usr/src/uts/common/io/fibre-channel/fca/emlxs/
H A Demlxs_clock.c844 /* Return if adapter interrupts have occurred */ in emlxs_timer_check_heartbeat()
849 /* No adapter interrupts have occured for 5 seconds now */ in emlxs_timer_check_heartbeat()
H A Demlxs_sli3.c1367 /* First cleanup old interrupts */ in emlxs_sli3_online()
4310 /* Disable interrupts associated with this msgid */ in emlxs_sli3_msi_intr()
4325 /* Restore interrupts */ in emlxs_sli3_msi_intr()
5487 /* Disable all host interrupts */ in emlxs_sli3_hba_kill()
5687 /* Disable all host interrupts */ in emlxs_sli3_hba_kill4quiesce()
5798 /* threads. This can happen if interrupts are enabled while */ in emlxs_handle_mb_event()
6649 /* Enable mailbox, error attention interrupts */ in emlxs_sli3_enable_intr()
6652 /* Enable ring interrupts */ in emlxs_sli3_enable_intr()
6702 /* Disable all adapter interrupts */ in emlxs_sli3_disable_intr()
/titanic_52/usr/src/grub/grub-0.97/netboot/
H A Dpcnet32.c650 IRQ - Enable, Disable, or Force interrupts
896 * interrupts. For ISA boards we get a DMA error, but VLB and PCI in pcnet32_probe()
H A D3c595.h242 * The following C_* acknowledge the various interrupts. Some of them don't
H A Depic100.c137 /* Disable ALL interrupts by setting the interrupt mask. */ in epic100_probe()
/titanic_52/usr/src/uts/common/io/bnxe/
H A Dbnxe_hw.c1437 BnxeLogDbg(pUM, "Enabling Interrupts"); in BnxeHwStartCore()
1441 BnxeLogWarn(pUM, "Failed to enable interrupts"); in BnxeHwStartCore()
1794 BnxeLogDbg(pUM, "Disabling Interrupts"); in BnxeHwStopCore()
/titanic_52/usr/src/cmd/format/
H A Dpartition.c416 * Lock out interrupts so the lists don't get mangled. in make_partition()
/titanic_52/usr/src/uts/common/io/chxge/com/
H A Dixf1010.c218 /* No-op interrupt operation as this MAC does not support interrupts */
/titanic_52/usr/src/uts/common/io/ib/adapters/hermon/
H A Dhermon_cfg.c158 * Whether Hermon should use MSI (Message Signaled Interrupts), if available.
/titanic_52/usr/src/uts/common/io/hxge/
H A Dhpi_rxdma.c582 * register which is used for generating interrupts.
/titanic_52/usr/src/lib/libcpc/i386/
H A Dconf_pentium.c251 * Interrupts
/titanic_52/usr/src/uts/common/io/e1000api/
H A De1000_82542.c205 DEBUGOUT("Masking off all interrupts\n"); in e1000_reset_hw_82542()
/titanic_52/usr/src/uts/common/io/fibre-channel/fca/oce/
H A Doce_hw.c472 /* disable the interrupts here and enable in start */ in oce_setup_adapter()
/titanic_52/usr/src/uts/i86pc/sys/
H A Dacpidev.h185 * Bit[2] Interrupts
/titanic_52/usr/src/boot/sys/boot/i386/libfirewire/
H A Dfwohci.c217 /* Disable interrupts */
/titanic_52/usr/src/uts/common/io/xge/hal/xgehal/
H A Dxgehal-fifo.c195 /* apply "interrupts per txdl" attribute */ in __hal_fifo_open()
/titanic_52/usr/src/uts/common/io/nvme/
H A Dnvme_reg.h431 uint16_t cq_ien:1; /* Interrupts Enabled */
/titanic_52/usr/src/uts/common/io/scsi/adapters/smartpqi/
H A Dsmartpqi.h290 int s_intr_cnt; /* # of interrupts */
/titanic_52/usr/src/uts/intel/io/dnet/
H A Ddnet.c863 * Reset chip (disables interrupts). in dnet_quiesce()
1572 * Enable the interrupts. Enable xmit interrupt in case we are in dnet_intr()
3501 /* Don't enable interrupts if they have been forced off */ in enable_interrupts()
3676 /* Stop detaches while processing interrupts */ in dnet_hack_intr()
3692 * interrupt routine. Because the interrupts from all devices come in to the
3711 * detached, and our interrupts are already disabled in dnet_detach_hacked_interrupt()
3736 * must have their interrupts disabled before we remove the handler in dnet_detach_hacked_interrupt()
/titanic_52/usr/src/uts/common/io/
H A Dbofi.c85 * Interrupts (generating spurious interrupts, losing interrupts,
86 * delaying interrupts).
712 * against drivers that use hilevel interrupts in bofi_attach()
4352 * send extra or fewer interrupts as requested in bofi_intercept_intr()
4365 * if more than 1000 spurious interrupts requested and in bofi_intercept_intr()
/titanic_52/usr/src/uts/common/io/comstar/port/qlt/
H A Dqlt.c801 /* get the # of interrupts */ in qlt_setup_msi()
882 /* Fixed interrupts can only have one interrupt. */ in qlt_setup_fixed()
1411 * use interrupts and regular mailbox interface. in qlt_port_online()
2202 * - Assumes that interrupts are disabled or not there.
2221 /* Disable Interrupts */ in qlt_reset_chip()
2254 /* Disable Interrupts (Probably not needed) */ in qlt_reset_chip()
2262 * - Assumes that interrupts are disabled or not there.
2415 * Assumes that interrupts are disabled and mailboxes are loaded.
5111 * Disable interrupts in qlt_firmware_dump()
5792 * Only called by debug dump. Interrupts ar
[all...]
/titanic_52/usr/src/man/man1/
H A Dmailx.1184 Ignore interrupts. See also \fBignore\fR in \fBInternal Variables\fR.
2208 Ignore interrupts while entering messages. Handy for noisy dial-up lines.
/titanic_52/usr/src/uts/intel/ia32/os/
H A Ddesctbls.c907 * gate which blocks interrupts atomically on entry; that's because of our
1056 * interrupts 32 - 255 in init_idt()
/titanic_52/usr/src/uts/common/io/efe/
H A Defe.c285 efe_error(dip, "fixed interrupts not supported!"); in efe_attach()
291 efe_error(dip, "no fixed interrupts available!"); in efe_attach()

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